Re: [PATCH 1/5] pinctrl: sunxi: Rework IRQ remuxing to avoid fixed mux value

From: Chen-Yu Tsai

Date: Mon Mar 23 2026 - 13:25:53 EST


On Mon, Mar 23, 2026 at 7:02 PM Andre Przywara <andre.przywara@xxxxxxx> wrote:
>
> Some Allwinner SoCs cannot read the state of a GPIO line when the pin is
> muxed to the IRQ function. To access that state anyway, we temporarily
> mux that pin back to GPIO input, then return it to the IRQ mux
> afterwards. This code assumes that the IRQ mux value is 0x6, even though
> newer SoCs (D1/T113/A523/...) encode the IRQ mux with 0xe.
>
> Avoid hardcoding the different IRQ mux values by saving the programmed
> value before switching to GPIO input, then restoring the saved value
> afterwards. This makes the code robust against future changes of the IRQ
> mux value. This also avoids calling the sunxi_pmx_set() function twice,
> each of which does a read/modify/write operation, fenced in by the pctl
> lock. The new code takes the lock around the whole operation, which is
> also safer since it avoids (probably theoretical) races against other
> code touching the mux register meanwhile.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>

Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxxxx>