[PATCH v5 5/5] drm/msm/dsi: Add support for RGB101010 pixel format

From: Alexander Koskovich

Date: Tue Mar 24 2026 - 08:00:03 EST


Add video and command mode destination format mappings for RGB101010,
and extend the VID_CFG0 DST_FORMAT bitfield to 3 bits to accommodate
the new format value.

Make sure this is guarded behind MSM_DSI_6G_VER >= V2.1.0 as anything
older does not support this.

Required for 10 bit panels such as the BOE BF068MWM-TD0 found on the
Nothing Phone (3a).

Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
Signed-off-by: Alexander Koskovich <akoskovich@xxxxx>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 22 ++++++++++++++++++++++
drivers/gpu/drm/msm/registers/display/dsi.xml | 5 ++++-
2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index b55ffe2fdec3..992407bbea84 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -757,6 +757,7 @@ static inline enum dsi_vid_dst_format
dsi_get_vid_fmt(const enum mipi_dsi_pixel_format mipi_fmt)
{
switch (mipi_fmt) {
+ case MIPI_DSI_FMT_RGB101010: return VID_DST_FORMAT_RGB101010;
case MIPI_DSI_FMT_RGB888: return VID_DST_FORMAT_RGB888;
case MIPI_DSI_FMT_RGB666: return VID_DST_FORMAT_RGB666_LOOSE;
case MIPI_DSI_FMT_RGB666_PACKED: return VID_DST_FORMAT_RGB666;
@@ -769,6 +770,7 @@ static inline enum dsi_cmd_dst_format
dsi_get_cmd_fmt(const enum mipi_dsi_pixel_format mipi_fmt)
{
switch (mipi_fmt) {
+ case MIPI_DSI_FMT_RGB101010: return CMD_DST_FORMAT_RGB101010;
case MIPI_DSI_FMT_RGB888: return CMD_DST_FORMAT_RGB888;
case MIPI_DSI_FMT_RGB666_PACKED:
case MIPI_DSI_FMT_RGB666: return CMD_DST_FORMAT_RGB666;
@@ -1713,6 +1715,26 @@ static int dsi_host_attach(struct mipi_dsi_host *host,
if (dsi->dsc)
msm_host->dsc = dsi->dsc;

+ if (msm_host->format == MIPI_DSI_FMT_RGB101010) {
+ if (!msm_dsi_host_version_geq(msm_host, MSM_DSI_VER_MAJOR_6G,
+ MSM_DSI_6G_VER_MINOR_V2_1_0)) {
+ DRM_DEV_ERROR(&msm_host->pdev->dev,
+ "RGB101010 not supported on this DSI controller\n");
+ return -EINVAL;
+ }
+
+ /*
+ * Downstream overrides RGB101010 back to RGB888 when DSC is enabled
+ * but widebus is not. Using RGB101010 in this case may require some
+ * extra changes.
+ */
+ if (msm_host->dsc &&
+ !msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) {
+ dev_warn(&msm_host->pdev->dev,
+ "RGB101010 with DSC but without widebus, may need extra changes\n");
+ }
+ }
+
ret = dsi_dev_attach(msm_host->pdev);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/msm/registers/display/dsi.xml b/drivers/gpu/drm/msm/registers/display/dsi.xml
index c7a7b633d747..e40125f75175 100644
--- a/drivers/gpu/drm/msm/registers/display/dsi.xml
+++ b/drivers/gpu/drm/msm/registers/display/dsi.xml
@@ -15,6 +15,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
<value name="VID_DST_FORMAT_RGB666" value="1"/>
<value name="VID_DST_FORMAT_RGB666_LOOSE" value="2"/>
<value name="VID_DST_FORMAT_RGB888" value="3"/>
+ <value name="VID_DST_FORMAT_RGB101010" value="4"/>
</enum>
<enum name="dsi_rgb_swap">
<value name="SWAP_RGB" value="0"/>
@@ -39,6 +40,7 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
<value name="CMD_DST_FORMAT_RGB565" value="6"/>
<value name="CMD_DST_FORMAT_RGB666" value="7"/>
<value name="CMD_DST_FORMAT_RGB888" value="8"/>
+ <value name="CMD_DST_FORMAT_RGB101010" value="9"/>
</enum>
<enum name="dsi_lane_swap">
<value name="LANE_SWAP_0123" value="0"/>
@@ -142,7 +144,8 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
</reg32>
<reg32 offset="0x0000c" name="VID_CFG0">
<bitfield name="VIRT_CHANNEL" low="0" high="1" type="uint"/> <!-- always zero? -->
- <bitfield name="DST_FORMAT" low="4" high="5" type="dsi_vid_dst_format"/>
+ <!-- high was 5 before DSI 6G 2.1.0 -->
+ <bitfield name="DST_FORMAT" low="4" high="6" type="dsi_vid_dst_format"/>
<bitfield name="TRAFFIC_MODE" low="8" high="9" type="dsi_traffic_mode"/>
<bitfield name="BLLP_POWER_STOP" pos="12" type="boolean"/>
<bitfield name="EOF_BLLP_POWER_STOP" pos="15" type="boolean"/>

--
2.53.0