RE: [PATCH] arm64: dts: imx8mp-debix-model-a: Correct PAD settings for pmicirqgrp
From: Peng Fan
Date: Tue Mar 24 2026 - 08:22:59 EST
Hi Laurent,
> Subject: Re: [PATCH] arm64: dts: imx8mp-debix-model-a: Correct PAD
> settings for pmicirqgrp
>
> Hi Peng,
>
> Thank you for the patch.
>
> On Tue, Mar 24, 2026 at 11:16:13AM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@xxxxxxx>
> >
> > With commit 5d0efaf47ee90 ("regulator: pca9450: Correct interrupt
> > type"), there is interrupt storm for i.MX8MP DEBIX Model A. Per
> > schematic, there is no on board PULL-UP resistors for GPIO1_IO03, so
> > need to set PAD PUE and PU together to make pull up work properly.
> >
> > Fixes: c86d350aae68e ("arm64: dts: Add device tree for the Debix
> Model
> > A Board")
> > Reported-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> > Closes:
> > Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> Tested-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
Thanks for quick testing.
>
> Frank, would you be able to handle this as a v7.0 regression fix ?
>
> I think the same is needed for imx8mp-debix-som-a.dtsi, but I can't
> confirm it as I don't have the schematics for the SoM, neither do I have
> access to the board.
I also gave a look, seems there are several boards are not setting
PAD correctly.
imx8mp-icore-mx8mp.dtsi
imx8mp-edm-g.dtsi
imx8mp-dhcom-som.dtsi
imx8mp-debix-som-a-bmb-08.dts
imx8mp-debix-som-a.dtsi
imx8mp-data-modul-edm-sbc.dts
imx8mp-aristainetos3a-som-v1.dtsi
imx8mp-ab2.dts
imx8mp-navqp
imx8mp-skov
I not check schematic, but from the PAD settings, only set PU is
not enough, PUE should also be set, unless there is board
PU.
We may need to fix them all. Let me do further check to see
if there are schematics available on internet.
Regards
Peng.
>
> Dan, Kieran, Stefan, could one of you check if you get an interrupt
> storm from the PMIC on v7.0 ?
>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> > b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> > index
> >
> 9422beee30b29c5a551b08476c80fbff96af3439..df7489587e48ed0c6
> 78f11291f6f
> > 2b77082ade95 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-debix-model-a.dts
> > @@ -440,7 +440,7 @@ MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA
> 0x400001c3
> >
> > pinctrl_pmic: pmicirqgrp {
> > fsl,pins = <
> > - MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03
> 0x41
> > + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03
> 0x000001c0
> > >;
> > };
> >
> >
> > ---
> > base-commit: 09c0f7f1bcdbc3c37a5a760cbec76bf18f278406
> > change-id: 20260324-imx8mp-dts-fix-512530fe4dcd
>
> --
> Regards,
>
> Laurent Pinchart