Re: [PATCH v3 0/6] can: flexcan: Add NXP S32N79 SoC support
From: Marc Kleine-Budde
Date: Tue Mar 24 2026 - 09:47:12 EST
On 23.03.2026 14:58:21, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@xxxxxxxxxxx>
>
> This patch series adds FlexCAN support for the NXP S32N79 SoC.
>
> The S32N79 is an automotive-grade processor from NXP with multiple
> FlexCAN instances. The FlexCAN IP integration on S32N79 differs from
> other SoCs in the interrupt routing - it uses two separate interrupt
> lines:
> - one interrupt for mailboxes 0-127
> - one interrupt for bus error detection and device state changes
Can you check if the S32N79 suffers from the
| /* No interrupt for error passive */
| #define FLEXCAN_QUIRK_BROKEN_PERR_STATE BIT(6)
problem? Maybe everyone just added the FLEXCAN_QUIRK_BROKEN_PERR_STATE
for the new SoC without actually testing it.
regards,
Marc
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