Re: [PATCH V2] arm64: dts: imx8mp-evk: Disable PCIe bus in the default dts

[Frank Li]

On Tue, Mar 24, 2026 at 02:45:39AM +0000, Sherry Sun wrote:
> > > Subject: Re: [PATCH V2] arm64: dts: imx8mp-evk: Disable PCIe bus in
> > > the default dts
> > >
> > > On Fri, Mar 20, 2026 at 05:03:53PM +0800, Sherry Sun wrote:
> > > > Disable the PCIe bus in the default device tree to avoid shared
> > > > regulator conflicts between SDIO and PCIe buses. The
> > > > non-deterministic probe order between these two buses can break the
> > > > PCIe initialization sequence, causing PCIe devices to fail detection
> > intermittently.
> > > >
> > > > On i.MX8MP EVK board, the M.2 connector is physically wired to both
> > > > USDHC1 and PCIe0, however the out-of-box module is SDIO IW612 WiFi,
> > > > so enable the SDIO WiFi in the default imx8mp-evk.dts, and provide a
> > > > separate device tree overlay (imx8mp-evk-pcie.dtso) to enable the
> > > > PCIe bus when needed.
> > > >
> > > > Signed-off-by: Sherry Sun <sherry.sun@xxxxxxx>
> > > > ---
> > > > Chanegs in V2:
> > > > 1. Improve the commit message to clarify SDIO WiFi is the out-of-box
> > > module on
> > > >    i.MX8MP EVK board.
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/Makefile        |  4 +++-
> > > >  .../boot/dts/freescale/imx8mp-evk-pcie.dtso   | 19
> > +++++++++++++++++++
> > > >  arch/arm64/boot/dts/freescale/imx8mp-evk.dts  |  4 ++--
> > > >  3 files changed, 24 insertions(+), 3 deletions(-)  create mode
> > > > 100644 arch/arm64/boot/dts/freescale/imx8mp-evk-pcie.dtso
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > > > b/arch/arm64/boot/dts/freescale/Makefile
> > > > index 780682258e71..107ca270ef32 100644
> > > > --- a/arch/arm64/boot/dts/freescale/Makefile
> > > > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > > > @@ -333,12 +333,14 @@ imx8mp-evk-lvds0-imx-lvds-hdmi-dtbs +=
> > > > imx8mp-evk.dtb imx8mp-evk-lvds0-imx-lvds-
> > > > imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0-dtbs += imx8mp-evk.dtb
> > > > imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtbo
> > > >  imx8mp-evk-lvds1-imx-lvds-hdmi-dtbs += imx8mp-evk.dtb
> > > > imx8mp-evk-lvds1-imx-lvds-hdmi.dtbo
> > > >  imx8mp-evk-mx8-dlvds-lcd1-dtbs += imx8mp-evk.dtb
> > > > imx8mp-evk-mx8-dlvds-lcd1.dtbo -imx8mp-evk-pcie-ep-dtbs +=
> > > > imx8mp-evk.dtb imx-pcie0-ep.dtbo
> > > > +imx8mp-evk-pcie-dtbs := imx8mp-evk.dtb imx8mp-evk-pcie.dtbo
> > > > +imx8mp-evk-pcie-ep-dtbs += imx8mp-evk-pcie.dtb imx-pcie0-ep.dtbo
> > > >  dtb-$(CONFIG_ARCH_MXC) +=
> > > > imx8mp-evk-lvds0-imx-dlvds-hdmi-channel0.dtb
> > > >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds0-imx-lvds-hdmi.dtb
> > > >  dtb-$(CONFIG_ARCH_MXC) +=
> > > > imx8mp-evk-lvds1-imx-dlvds-hdmi-channel0.dtb
> > > >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-lvds1-imx-lvds-hdmi.dtb
> > > >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-mx8-dlvds-lcd1.dtb
> > > > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-pcie.dtb
> > > >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk-pcie-ep.dtb
> > > >
> > > >  imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33-dtbs +=
> > > > imx8mp-tqma8mpql-mba8mpxl.dtb
> > > > imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtbo
> > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk-pcie.dtso
> > > > b/arch/arm64/boot/dts/freescale/imx8mp-evk-pcie.dtso
> > > > new file mode 100644
> > > > index 000000000000..4f6546d442bf
> > > > --- /dev/null
> > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk-pcie.dtso
> > > > @@ -0,0 +1,19 @@
> > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > > +/*
> > > > + * Copyright 2026 NXP
> > > > + */
> > > > +
> > > > +/dts-v1/;
> > > > +/plugin/;
> > > > +
> > > > +&pcie_phy {
> > > > +	status = "okay";
> > > > +};
> > > > +
> > > > +&pcie0 {
> > > > +	status = "okay";
> > > > +};
> > > > +
> > > > +&usdhc1 {
> > > > +	status = "disabled";
> > > > +};
> > >
> > > Please use one overlay for both imx95 and imx8mp to enable pcie0 and
> > > disable usdhc1.
> >
> > Hi Frank,
> >
> > imx8mp has a specific pcie_phy, I disabled it in the default imx8mp-evk.dts

Suppose, you needn't disable phy.

> > and enabled it in xxx-pcie.dtso, if we use one overlay for both imx95 and
> > imx8mp, is it acceptable that we need to keep the 8mp pcie_phy enabled
> > even in non-PCIe usage scenarios?
> >
>
> In addition, another difference between imx8mp and imx95 is that imx8mp connects usdhc1 to the M.2 connector, while imx95 connects usdhc3 to the M.2 connector. The usdhc interfaces are different, so we cannot use the same DTSO file.

you use addtional label.

for example

m2_usdhc: &usdhc1 {
	...
};

in overlay file

&m2_usdhc {
	status = "disabled";
}

Frank
>
> Best Regards
> Sherry