Re: [PATCH 3/3] memory: renesas-rpc-if: Add support for RZ/T2H SoC

[Lad, Prabhakar]

Hi Wolfram,

On Wed, Mar 18, 2026 at 2:03 PM Lad, Prabhakar
<prabhakar.csengg@xxxxxxxxx> wrote:
>
> Hi Wolfram,
>
> Thank you for the review.
>
> On Mon, Mar 16, 2026 at 2:16 PM Wolfram Sang
> <wsa+renesas@xxxxxxxxxxxxxxxxxxxx> wrote:
> >
> >
> > > Add a new compatible string "renesas,r9a09g077-xspi" for RZ/T2H while
> > > reusing the existing xspi_info_r9a09g047 OF data. This allows the driver
> > > to bind correctly on RZ/T2H while the register differences can be handled
> > > in future updates as the affected configuration registers are not currently
> > > accessed by the driver.
> >
> > This sounds fragile to me. Can you add a comment somewhere in the driver
> > or headers so people wanting to use these registers will find out that
> > the SoCs are not compatible anymore?
> >
> I could but they would stay unused.
>
> For example, consider the COMCFG register.
> On RZ/G3E, bits 0-1 are used to control the `Channel arbitration mode`
> On RZ/T2H, bits 0-1 are marked as reserved and the write value should be 0.
>
> Currently the COMCFG register is not handled in the driver. Similarly
> it's the same for other differences.
>
> Can you please suggest how to handle this case.
>
Would adding SoC specific data like below be OK?

static const struct rpcif_info xspi_info_r9a09g077 = {
       .regmap_config = &xspi_regmap_config,
       .impl = &xspi_impl,
       .type = XSPI_RZ_T2H,
};


{ .compatible = "renesas,r9a09g077-xspi", .data = &xspi_info_r9a09g077 },

Cheers,
Prabhakar