Re: [PATCH 1/5] PCI: intel-gw: Move interrupt enable to own function

[Manivannan Sadhasivam]

On Tue, Mar 17, 2026 at 11:12:49AM +0100, Florian Eckert wrote:
> To improve the readability of the code, move the interrupt enable
> instructions to a separate function. That is already done for the
> disable interrupt instruction.
> 
> Signed-off-by: Florian Eckert <fe@xxxxxxxxxx>
> ---
>  drivers/pci/controller/dwc/pcie-intel-gw.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
> index c21906eced61896c8a8307dbd6b72d229f9a5c5f..3a85bd0ef1b7f9414ce19fe56d82a78e34e9b648 100644
> --- a/drivers/pci/controller/dwc/pcie-intel-gw.c
> +++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
> @@ -196,6 +196,13 @@ static void intel_pcie_device_rst_deassert(struct intel_pcie *pcie)
>  	gpiod_set_value_cansleep(pcie->reset_gpio, 0);
>  }
>  
> +static void intel_pcie_core_irq_enable(struct intel_pcie *pcie)
> +{
> +	pcie_app_wr(pcie, PCIE_APP_IRNEN, 0);
> +	pcie_app_wr(pcie, PCIE_APP_IRNCR, PCIE_APP_IRN_INT);
> +	pcie_app_wr(pcie, PCIE_APP_IRNEN, PCIE_APP_IRN_INT);

I'm confused. Previous code changed PCIE_APP_IRNEN register by writing to
PCIE_APP_IRN_INT field. But this function is now changing PCIE_APP_IRNEN and
PCIE_APP_IRNCR registers.

- Mani

> +}
> +
>  static void intel_pcie_core_irq_disable(struct intel_pcie *pcie)
>  {
>  	pcie_app_wr(pcie, PCIE_APP_IRNEN, 0);
> @@ -317,9 +324,7 @@ static int intel_pcie_host_setup(struct intel_pcie *pcie)
>  	if (ret)
>  		goto app_init_err;
>  
> -	/* Enable integrated interrupts */
> -	pcie_app_wr_mask(pcie, PCIE_APP_IRNEN, PCIE_APP_IRN_INT,
> -			 PCIE_APP_IRN_INT);
> +	intel_pcie_core_irq_enable(pcie);
>  
>  	return 0;
>  
> 
> -- 
> 2.47.3
> 

-- 
மணிவண்ணன் சதாசிவம்