[PATCH v6 33/90] x86/cpu: Use parsed CPUID(0x2)

From: Ahmed S. Darwish

Date: Thu Mar 26 2026 - 22:33:14 EST


At the Intel cacheinfo code, use parsed CPUID(0x2) access instead of a
direct CPUID query.

Remove the "maximum standard CPUID level >= 0x2" check as the parsed
CPUID API output NULL check is equivalent.

Signed-off-by: Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
---
arch/x86/kernel/cpu/intel.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 08869fecdf30..cad66ca14ca4 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -722,14 +722,14 @@ static void intel_tlb_lookup(const struct leaf_0x2_table *desc)
static void intel_detect_tlb(struct cpuinfo_x86 *c)
{
const struct leaf_0x2_table *desc;
- union leaf_0x2_regs regs;
- u8 *ptr;
+ const struct cpuid_regs *regs;
+ const u8 *ptr;

- if (c->cpuid_level < 2)
+ regs = cpuid_leaf_raw(c, 0x2);
+ if (!regs)
return;

- cpuid_leaf_0x2(&regs);
- for_each_cpuid_0x2_desc(regs, ptr, desc)
+ for_each_parsed_cpuid_0x2_desc(regs, ptr, desc)
intel_tlb_lookup(desc);
}

--
2.53.0