Re: [PATCH v2] PCI: imx6: Don't remove MSI capability For i.MX7D/i.MX8M

[Manivannan Sadhasivam]

On Mon, Mar 30, 2026 at 09:02:57AM +0000, Hongxing Zhu wrote:
> > -----Original Message-----
> > From: Manivannan Sadhasivam <mani@xxxxxxxxxx>
> > Sent: 2026年3月30日 15:23
> > To: Hongxing Zhu <hongxing.zhu@xxxxxxx>
> > Cc: Frank Li <frank.li@xxxxxxx>; l.stach@xxxxxxxxxxxxxx; lpieralisi@xxxxxxxxxx;
> > kwilczynski@xxxxxxxxxx; robh@xxxxxxxxxx; bhelgaas@xxxxxxxxxx;
> > s.hauer@xxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx;
> > linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> > imx@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; stable@xxxxxxxxxxxxxxx;
> > Qiang Yu <qiang.yu@xxxxxxxxxxxxxxxx>
> > Subject: Re: [PATCH v2] PCI: imx6: Don't remove MSI capability For
> > i.MX7D/i.MX8M
> > 
> > + Qiang
> > 
> > On Thu, Mar 19, 2026 at 05:18:23PM +0800, Richard Zhu wrote:
> > > The MSI trigger mechanism for endpoint devices connected to i.MX7D,
> > > i.MX8MM, and i.MX8MQ PCIe root complex ports depends on the MSI
> > > capability register settings in the root complex. Removing the MSI
> > > capability breaks MSI functionality for these endpoints.
> > >
> > 
> > What is the relation between Root Port MSI and endpoint MSI? Endpoint MSIs
> > should be routed to the platform MSI controller (DWC i.MSI-RX or External like
> > GIC-ITS) independent of the Root Port MSI state.
> Hi Mani:
> Thank for your kindly concern.
> The MSI controller (DWC i.MSI-RX) on i.MX7D, i.MX8MM, and i.MX8MQ platforms
> requires the RC's MSI capability to remain enabled. Removing it breaks MSI
> routing from endpoints to the platform MSI controller.
> 

I understand that MSI is broken on your hardware, but I was trying to understand
'why' specifically. Because, Root Port MSI capability doesn't have anything to
do with the endpoint MSIs. And since you mentioned that this issue happens only
on one platform, could be that the hardware designers have mistakenly wired the
Root Port's 'MSI Enable' to iMSI-RX's enable signal or something similar?

If so, we can introduce a flag 'dw_pcie_rp::keep_rp_msi_en' or something
similar, set it for affected SoCs and skip the capability removal in
pcie-designware-host.c

- Mani

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