RE: [Intel-wired-lan] [PATCH v4 net-next 6/8] ice: implement CPI support for E825C

[Nitka, Grzegorz]

> -----Original Message-----
> From: Loktionov, Aleksandr <aleksandr.loktionov@xxxxxxxxx>
> Sent: Friday, March 27, 2026 6:13 PM
> To: Nitka, Grzegorz <grzegorz.nitka@xxxxxxxxx>; netdev@xxxxxxxxxxxxxxx
> Cc: Vecera, Ivan <ivecera@xxxxxxxxxx>; vadim.fedorenko@xxxxxxxxx;
> kuba@xxxxxxxxxx; jiri@xxxxxxxxxxx; edumazet@xxxxxxxxxx; Kitszel,
> Przemyslaw <przemyslaw.kitszel@xxxxxxxxx>; richardcochran@xxxxxxxxx;
> donald.hunter@xxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Kubalewski,
> Arkadiusz <arkadiusz.kubalewski@xxxxxxxxx>; andrew+netdev@xxxxxxx;
> intel-wired-lan@xxxxxxxxxxxxxxxx; horms@xxxxxxxxxx;
> Prathosh.Satish@xxxxxxxxxxxxx; Nguyen, Anthony L
> <anthony.l.nguyen@xxxxxxxxx>; pabeni@xxxxxxxxxx;
> davem@xxxxxxxxxxxxx
> Subject: RE: [Intel-wired-lan] [PATCH v4 net-next 6/8] ice: implement CPI
> support for E825C
> 
> 
> 
> > -----Original Message-----
> > From: Intel-wired-lan <intel-wired-lan-bounces@xxxxxxxxxx> On Behalf
> > Of Grzegorz Nitka
> > Sent: Thursday, March 26, 2026 5:29 PM
> > To: netdev@xxxxxxxxxxxxxxx
> > Cc: Vecera, Ivan <ivecera@xxxxxxxxxx>; vadim.fedorenko@xxxxxxxxx;
> > kuba@xxxxxxxxxx; jiri@xxxxxxxxxxx; edumazet@xxxxxxxxxx; Kitszel,
> > Przemyslaw <przemyslaw.kitszel@xxxxxxxxx>; richardcochran@xxxxxxxxx;
> > donald.hunter@xxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Kubalewski,
> > Arkadiusz <arkadiusz.kubalewski@xxxxxxxxx>; andrew+netdev@xxxxxxx;
> > intel-wired-lan@xxxxxxxxxxxxxxxx; horms@xxxxxxxxxx;
> > Prathosh.Satish@xxxxxxxxxxxxx; Nguyen, Anthony L
> > <anthony.l.nguyen@xxxxxxxxx>; pabeni@xxxxxxxxxx;
> davem@xxxxxxxxxxxxx
> > Subject: [Intel-wired-lan] [PATCH v4 net-next 6/8] ice: implement
> > CPI support for E825C
> >
> > Add full CPI (Converged PHY Interface) command handling required for
> > E825C devices. The CPI interface allows the driver to interact with
> > PHY-side control logic through the LM/PHY command registers,
> > including enabling/disabling/selection of PHY reference clock.
> >
> > This patch introduces:
> >  - a new CPI subsystem (ice_cpi.c / ice_cpi.h) implementing the CPI
> >    request/acknowledge state machine, including REQ/ACK protocol,
> >    command execution, and response handling
> >  - helper functions for reading/writing PHY registers over Sideband
> >    Queue
> >  - CPI command execution API (ice_cpi_exec) and a helper for
> > enabling or
> >    disabling Tx reference clocks (CPI 0xF1 opcode 'Config PHY
> > clocking')
> >  - addition of the non-posted write opcode (wr_np) to SBQ
> >  - Makefile integration to build CPI support together with the PTP
> > stack
> >
> > This provides the infrastructure necessary to support PHY-side
> > configuration flows on E825C and is required for advanced link
> > control and Tx reference clock management.
> >
> > Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@xxxxxxxxx>
> > Signed-off-by: Grzegorz Nitka <grzegorz.nitka@xxxxxxxxx>
> > ---
> >  drivers/net/ethernet/intel/ice/Makefile      |   2 +-
> >  drivers/net/ethernet/intel/ice/ice_cpi.c     | 347
> > +++++++++++++++++++
> >  drivers/net/ethernet/intel/ice/ice_cpi.h     |  69 ++++
> >  drivers/net/ethernet/intel/ice/ice_sbq_cmd.h |   5 +-
> >  4 files changed, 420 insertions(+), 3 deletions(-)  create mode
> > 100644 drivers/net/ethernet/intel/ice/ice_cpi.c
> >  create mode 100644 drivers/net/ethernet/intel/ice/ice_cpi.h
> >
> > diff --git a/drivers/net/ethernet/intel/ice/Makefile
> > b/drivers/net/ethernet/intel/ice/Makefile
> > index 5b2c666496e7..38db476ab2ec 100644
> > --- a/drivers/net/ethernet/intel/ice/Makefile
> > +++ b/drivers/net/ethernet/intel/ice/Makefile
> > @@ -54,7 +54,7 @@ ice-$(CONFIG_PCI_IOV) +=	\
> >  	ice_vf_mbx.o		\
> >  	ice_vf_vsi_vlan_ops.o	\
> >  	ice_vf_lib.o
> 
> ...
> 
> > +
> > +union cpi_reg_phy_cmd_data {
> > +	struct {
> > +		u16 data;
> > +		u16 opcode : 8;
> > +		u16 portlane : 3;
> > +		u16 reserved_13_11: 3;
> > +		u16 error : 1;
> > +		u16 ack : 1;
> > +	} __packed field;
> > +	u32 val;
> > +};
> Why not use FIELD_GET()/FIELD_PREP() with GENMASK()? Bitfields are
> compiled differently on LE nd BE CPUs.
> 

Thanks for your comment.
To be addressed in the next iteration.

Regards

Grzegorz

> > +
> > +union cpi_reg_lm_cmd_data {
> > +	struct {
> > +		u16 data;
> > +		u16 opcode : 8;
> > +		u16 portlane : 3;
> > +		u16 reserved_12_11: 2;
> > +		u16 get_set : 1;
> > +		u16 cpi_reset : 1;
> > +		u16 cpi_req : 1;
> > +	} __packed field;
> > +	u32 val;
> > +};
> Why not use FIELD_GET()/FIELD_PREP() with GENMASK()? Bitfields are
> compiled differently on LE nd BE CPUs.
> 
> 
> ...
> 
> >
> >  #define ICE_SBQ_MSG_FLAGS	0x40
> > --
> > 2.39.3