RE: [PATCH 07/22] ASoC: dt-bindings: renesas,rsnd: Add RZ/G3E support

[John Madieu]

Hi Krzysztof,

Thanks for the review.

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> Sent: Friday, March 20, 2026 10:30 AM
> To: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> Subject: Re: [PATCH 07/22] ASoC: dt-bindings: renesas,rsnd: Add RZ/G3E
> support
> 
> On Thu, Mar 19, 2026 at 04:53:19PM +0100, John Madieu wrote:
> > Add support for the RZ/G3E (R9A09G047) SoC audio subsystem.
> >
> > RZ/G3E has a different audio architecture from R-Car Gen2/Gen3/Gen4,
> > with additional clocks and resets:
> > - Per-SSI ADG clocks (adg.ssi.0-9)
> > - SCU related clocks (scu, scu_x2, scu_supply)
> > - SSIF supply clock
> > - AUDMAC peri-peri clock
> > - ADG clock
> > - Additional resets for SCU, ADG, and AUDMAC peri-peri
> >
> > RZ/G3E has 5 DMA controllers that can all be used by audio peripherals.
> > To allow the DMA core to distribute channels across all available
> > controllers, increase the maximum number of DMA entries in DVC, SRC,
> > and SSIU sub-nodes so that multiple providers can be listed with
> > repeated channel names.
> >
> > Signed-off-by: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> > ---
> >  .../bindings/sound/renesas,rsnd.yaml          | 169 +++++++++++++++---
> >  1 file changed, 148 insertions(+), 21 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
> > b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
> > index e8a2acb92646..bc8885c4fa24 100644
> > --- a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
> > +++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml
> > @@ -58,6 +58,7 @@ properties:
> >            - renesas,rcar_sound-gen2
> >            - renesas,rcar_sound-gen3
> >            - renesas,rcar_sound-gen4
> > +          - renesas,rcar_sound-r9a09g047     # RZ/G3E
> 
> Do not use underscores in compatibles. Previously used wrong style is not
> the excuse here, just like previously poor code, mistakes, bugs,
> unreadable approches is not justification to repeat the same.
> 

Got it.

> >
> >    reg:
> >      minItems: 1
> > @@ -97,20 +98,22 @@ properties:
> >
> >    resets:
> >      minItems: 1
> > -    maxItems: 11
> > +    maxItems: 14
> >
> >    reset-names:
> >      minItems: 1
> > -    maxItems: 11
> > +    maxItems: 14
> >
> >    clocks:
> >      description: References to SSI/SRC/MIX/CTU/DVC/AUDIO_CLK clocks.
> >      minItems: 1
> > -    maxItems: 31
> > +    maxItems: 47
> >
> >    clock-names:
> >      description: List of necessary clock names.
> >      # details are defined below
> > +    minItems: 1
> > +    maxItems: 47
> >
> >    # ports is below
> >    port:
> > @@ -136,9 +139,17 @@ properties:
> >
> >          properties:
> >            dmas:
> > -            maxItems: 1
> > +            description:
> > +              Must contain unique DMA specifiers, one per available
> > +              DMAC. On RZ/G3E, up to 5 for transmission.
> > +            minItems: 1
> > +            maxItems: 5
> >            dma-names:
> > -            const: tx
> > +            minItems: 1
> > +            maxItems: 5
> > +            items:
> > +              enum:
> > +                - tx
> 
> Multiple levels, multiple if:then: (further) - I don't find this binding
> manageable/readable. You should split it, with common binding defining
> common part of hardware or interface if there is such.

I as you suggested, I'll split it. Just to double check, should I fix
any bug found in there (like existing compatible strings having underscore
separators) ? Or should I just split and make sure only new SoC support is
bug free ?

Regards,
John


> 
> Best regards,
> Krzysztof