Re: New default binding for PWM devices? [Was: Re: [PATCH] dt-bindings: timer: xlnx,xps-timer: Make PWM in example usable]

From: Uwe Kleine-König

Date: Tue Mar 31 2026 - 03:08:25 EST


Hello Geert,

On Mon, Mar 30, 2026 at 02:12:47PM +0200, Geert Uytterhoeven wrote:
> On Sat, 7 Jun 2025 at 09:23, Uwe Kleine-König
> <u.kleine-koenig@xxxxxxxxxxxx> wrote:
> > On Fri, Jun 06, 2025 at 09:13:24AM -0500, Rob Herring wrote:
> > > reg:
> > > > maxItems: 1
> > > >
> > > > - '#pwm-cells': true
> > > > + '#pwm-cells':
> > > > + const: 3
> > > >
> > > > xlnx,count-width:
> > > > $ref: /schemas/types.yaml#/definitions/uint32
> > > > @@ -82,7 +83,7 @@ examples:
> > > > };
> > > >
> > > > timer@800f0000 {
> > > > - #pwm-cells = <0>;
> > > > + #pwm-cells = <3>;
> > > > clock-names = "s_axi_aclk";
> > > > clocks = <&zynqmp_clk 71>;
> > > > compatible = "xlnx,xps-timer-1.00.a";
> > > >
> > > > There is however one concern that I want to get resolved first to
> > > > prevent churn:
> > > >
> > > > In principle I think it's bad that a phandle to a PWM must contain a
> > > > period and flags specifying the polarity. For some use cases the period
> > > > might not matter or is implicitly given or more than one period length
> > > > is relevant.
> > >
> > > Why can't the period be 0 and no flags set if they aren't needed?
> >
> > I don't say they cannot, and probably that's the most sane option if
> > there is no fixed default period and flags and we're sticking to 3
> > cells.
>
> So zero should have been used for drivers/pwm/pwm-argon-fan-hat.c?

Do you mean #pwm-cells = <0>? Or period = flags = 0?

If the phandle wouldn't contain period and flags and so it would only be
used to identify the PWM to use and say nothing about how it is used,
then using #pwm-cells = <0> for PWM chips that only have a single PWM
would work fine.

Best regards
Uwe

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