Re: [PATCH v2 6/7] dt-bindings: PCI: intel,lgm-pcie: Make atu resource mandatory

[Krzysztof Kozlowski]

On Mon, Mar 30, 2026 at 12:52:16PM +0200, Florian Eckert wrote:
> 
> 
> On 2026-03-30 11:50, Krzysztof Kozlowski wrote:
> > On 30/03/2026 11:07, Florian Eckert wrote:
> > > The ATU information is already set in the dwc core if it is
> > > specified in
> > > the DTS. The driver uses its own value here [1]. This information is
> > > hardware specific and should therefore be maintained in the DTS rather
> > > than in the source.
> > > 
> > > Backwards compatibility is not an issue here [5], as the driver is
> > > exclusively used by Maxlinear.
> > 
> > What does that mean exactly? It is not used outside of Maxlinear
> > company, so it is purely internal device and no one outside of Maxlinear
> > has it?
> 
> Background information:
> 
> The PCIe IP core is only available for Maxlinear’s URX851 and
> URX850 SoCs. However, the chip was originally developed by Intel when
> they acquired Lantiq’s home networking division in 2015 [1] for this
> SoCs. In 2020 the home network division was sold to Maxlinear [2].
> 
> Since then, Maxlinear has been responsible for the driver. However,
> their SDK is outdated and based on kernel 5.15. Other than that, not

v5.15 DTS user of this binding is still valid user. Why would you break
it?

> much is happening! Even the developers listed as maintainers can no
> longer be reached. When it came to the patch set, the email couldn't
> be delivered  to the responsible developer
> 'Chuanhua Lei <lchuanhua@xxxxxxxxxxxxx>' either. The email bounced
> back.

Not really relevant to my question. I understand that this is not
maintained, but I asked about backwards compatibility.

Backwards compatibility of the ABI means that existing in-tree and ALL
out-of-tree users of given ABI must keep working fine. Properties with
lists have strictly defined order, so changing that order is considered
ABI break, unless you prove otherwise.

Calling code unmantained is not proving that ABI is not broken.

> 
> The company I work for is using the chip and is currently in the
> process  of extracting the key components from the SDK so that the
> SoC URX851/URX850 can work again with a mainline kernel again.
> 
> [1] https://www.intc.com/news-events/press-releases/detail/364/intel-to-acquire-lantiq-advancing-the-connected-home
> [2] https://investors.maxlinear.com/press-releases/detail/395/maxlinear-to-acquire-intels-home-gateway-platform
> 
> > Then we can as well remove it and I don't quite get why you are working
> > on this (since no one can use it outside of Maxlinear...).
> 
> Maxlinear continues to sell that SoC. They are *not' EOL.
> It’s just that their Board Support Package (SDK) is no longer
> up to date.
> 
> > > 
> > > Old DTS entry for PCIe:
> > > 
> > > reg = <0xd1000000 0x1000>,
> > >       <0xd3000000 0x20000>,
> > >       <0xd0c41000.0x1000>;
> > > reg-names = "dbi", "config", "app";
> > > 
> > > New DTS entry for PCIe:
> > > 
> > > reg = <0xd1000000 0x1000>,
> > >       <0xd10c0000 0x1000>,
> > >       <0xd3000000 0x20000>,
> > >      <0xd0c41000.0x1000>;
> > > reg-names = "dbi", "atu", "config", "app";
> > 
> > Drop, irrelevant. You still break all users of this binding.
> 
> As noted in link [3], a Maxlinear developer has stated that
> backwards compatibility is not necessary here, as the IP core
> is used exclusively by Maxlinear`s URX851 and URX850 SoC`s.
> 
> We use these SoCs in our Produkt for internet home gateway
> routers.
> 
> [3] https://lore.kernel.org/all/BY3PR19MB507667CE7531D863E1E5F8AEBDD82@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/

OK, yet I do not understand "driver is only used for internally". How
Maxlinear engineer can know all projects around the world and all 7
billion people if they use that ABI? And if they are right and no one
uses it outside of Maxlinear, then let's drop this code. It's dead code,
no?

Best regards,
Krzysztof