Re: [PATCH 1/7] cache: ax45mp_cache: refactor cache driver for generic Andes platform support

[Mina Chou]

Thank you both, Krzysztof and Conor, for the detailed review.
I appreciate the feedback and admit this series needed more work
before sending. I will address all the issues in the next version.
 
A bit of background on the motivation: the main goal of this series
was to prepare the Andes cache driver for a SoC Allwinner Avaotaf1 V821,
which uses the Andes A27L2 CPU. We wanted to share a single cache driver
across different Andes CPU variants, which is why we tried to move toward
more generic naming in both the driver and the compatible strings.
 
We have two questions we'd appreciate guidance on:
  a) On compatible string naming: We'll drop patch [5/7][6/7] and won't
     rename any existing compatible strings. But we'd like to confirm
     the preferred approach for A27L2: would it be acceptable to add
     a generic compatible (andestech,andes-llcache) as an addition?
     If so, would a CPU-specific compatible (andestech,a27l2-cache)
     still be required alongside it?
 
  b) On Avaotaf1 V821 support: We are not in a position to submit the
     DTS on behalf of Allwinner. However, we would like to add the
     corresponding compatible strings to the existing binding
     documents (andestech,andes-llcache.yaml, sifive,plic-1.0.0.yaml,
     and riscv/cpus.yaml) in advance, so that the bindings are ready
     when Allwinner eventually submits their DTS.
     Would it be acceptable to upstream binding-only changes without
     an accompanying DTS at this stage?
 
For the next version, we're thinking of keeping only the changes
needed to generalize the cache driver, and dropping the improvements
for now to keep things focused. If you have any suggestion on how
to approach this, we'd love to hear it.
 
Thanks again for your patience.
 
Best regards,
Mina