Re: [PATCH v1] PCI: mediatek-gen3: Align PERST# sequence with PCIe CEM specification

[Chen-Yu Tsai]

On Wed, Apr 1, 2026 at 11:19 AM Jian Yang <jian.yang@xxxxxxxxxxxx> wrote:
>
> Fix the control sequence of PERST# during system bootup/shutdown to
> meet the requirement from PCIe CEM specification. There are two major
> changes in this patch:
>
> 1. Some of MediaTek's chip will stop generating REFCLK if the
> PCIE_PHY_RSTB signal of PCIe controller is asserted. We have to
> adjust the startup sequence as follows to ensure that PERST# will be
> de-asserted after the REFCLK is stable:
> Assert PHY reset and PERST# -> delay 10ms -> De-assert PHY reset ->
> delay 100ms -> De-assert PERST#
>
> 2. Add 'shutdown' callback to control the timing of PERST# and power
> during the system shutdown phase, ensuring that PERST# is active
> before the power on connector is removed.
>
> Signed-off-by: Jian Yang <jian.yang@xxxxxxxxxxxx>

Seems correct to me.

Reviewed-by: Chen-Yu Tsai <wenst@xxxxxxxxxxxx>

If possible, I think we would want this merged this cycle together
with the other pwrctrl changes.