RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable for dual mux

[Erim, Salih]

[AMD Official Use Only - AMD Internal Distribution Only]

Reviewed-by: Salih Erim <salih.erim@xxxxxxx>

> -----Original Message-----
> From: Erim, Salih
> Sent: Wednesday, April 1, 2026 2:12 PM
> To: Simek, Michal <michal.simek@xxxxxxx>; Jonathan Cameron
> <jic23@xxxxxxxxxx>; Christofer Jonason <christofer.jonason@xxxxxxxxxxxxxxxx>;
> O'Griofa, Conall <conall.ogriofa@xxxxxxx>
> Cc: lars@xxxxxxxxxx; dlechner@xxxxxxxxxxxx; nuno.sa@xxxxxxxxxx;
> andy@xxxxxxxxxx; victor.jonsson@xxxxxxxxxxxxxxxx; linux-iio@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> stable@xxxxxxxxxxxxxxx
> Subject: RE: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in postdisable
> for dual mux
>
> Hi Christofer,
>
> The code change looks correct to me - it aligns postdisable with preenable by
> reusing xadc_get_seq_mode(), and the scope is limited to dual external mux
> configurations.
>
> Since this is targeting stable, could you please share what hardware/board this was
> tested on and how you verified that VAUX[8-15] channels return correct data with
> the fix applied?
>
> Reviewed-by: Salih Emin <salih.emin@xxxxxxx>
>
> Thanks,
> Salih
>
>
> > -----Original Message-----
> > From: Simek, Michal <michal.simek@xxxxxxx>
> > Sent: Tuesday, March 10, 2026 7:43 AM
> > To: Jonathan Cameron <jic23@xxxxxxxxxx>; Christofer Jonason
> > <christofer.jonason@xxxxxxxxxxxxxxxx>; Erim, Salih
> > <Salih.Erim@xxxxxxx>; O'Griofa, Conall <conall.ogriofa@xxxxxxx>
> > Cc: lars@xxxxxxxxxx; dlechner@xxxxxxxxxxxx; nuno.sa@xxxxxxxxxx;
> > andy@xxxxxxxxxx; victor.jonsson@xxxxxxxxxxxxxxxx;
> > linux-iio@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> > linux-kernel@xxxxxxxxxxxxxxx; stable@xxxxxxxxxxxxxxx
> > Subject: Re: [PATCH v2] iio: adc: xilinx-xadc: Fix sequencer mode in
> > postdisable for dual mux
> >
> > +Salih, Conall,
> >
> > On 3/7/26 13:41, Jonathan Cameron wrote:
> > > On Wed,  4 Mar 2026 10:07:27 +0100
> > > Christofer Jonason <christofer.jonason@xxxxxxxxxxxxxxxx> wrote:
> > >
> > >> xadc_postdisable() unconditionally sets the sequencer to continuous
> > >> mode. For dual external multiplexer configurations this is incorrect:
> > >> simultaneous sampling mode is required so that ADC-A samples
> > >> through the mux on VAUX[0-7] while ADC-B simultaneously samples
> > >> through the mux on VAUX[8-15]. In continuous mode only ADC-A is
> > >> active, so VAUX[8-15] channels return incorrect data.
> > >>
> > >> Since postdisable is also called from xadc_probe() to set the
> > >> initial idle state, the wrong sequencer mode is active from the
> > >> moment the driver loads.
> > >>
> > >> The preenable path already uses xadc_get_seq_mode() which returns
> > >> SIMULTANEOUS for dual mux. Fix postdisable to do the same.
> > >>
> > >> Fixes: bdc8cda1d010 ("iio:adc: Add Xilinx XADC driver")
> > >> Cc: stable@xxxxxxxxxxxxxxx
> > >> Signed-off-by: Christofer Jonason
> > >> <christofer.jonason@xxxxxxxxxxxxxxxx>
> > >
> > > I'll leave this on list for a little longer as I'd really like a
> > > confirmation of this one from the AMD Xilinx folk.
> >
> > Salih/Conall: Please look at this patch and provide your comment or tag.
> >
> > Thanks,
> > Michal