RE: [Intel-wired-lan] [PATCH iwl-net v4] ice: fix missing dpll notifications for SW pins
From: Rinitha, SX
Date: Wed Apr 01 2026 - 13:36:39 EST
> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@xxxxxxxxxx> On Behalf Of Petr Oros
> Sent: 20 March 2026 02:23
> To: netdev@xxxxxxxxxxxxxxx
> Cc: Vecera, Ivan <ivecera@xxxxxxxxxx>; Kitszel, Przemyslaw <przemyslaw.kitszel@xxxxxxxxx>; Eric Dumazet <edumazet@xxxxxxxxxx>; Kubalewski, Arkadiusz <arkadiusz.kubalewski@xxxxxxxxx>; Andrew Lunn <andrew+netdev@xxxxxxx>; Nguyen, Anthony L <anthony.l.nguyen@xxxxxxxxx>; Simon Horman <horms@xxxxxxxxxx>; intel-wired-lan@xxxxxxxxxxxxxxxx; Jakub Kicinski <kuba@xxxxxxxxxx>; Paolo Abeni <pabeni@xxxxxxxxxx>; David S. Miller <davem@xxxxxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx
> Subject: [Intel-wired-lan] [PATCH iwl-net v4] ice: fix missing dpll notifications for SW pins
>
> The SMA/U.FL pin redesign (commit 2dd5d03c77e2 ("ice: redesign dpll sma/u.fl pins control")) introduced software-controlled pins that wrap backing CGU input/output pins, but never updated the notification and data paths to propagate pin events to these SW wrappers.
>
> There are three problems:
>
> 1) ice_dpll_notify_changes() sends dpll_pin_change_ntf() only for the
> direct CGU input pin stored in d->active_input. When the active
> input changes, SW pins (SMA/U.FL) that wrap the old or new active
> input never receive a change notification. As a result, userspace
> consumers such as synce4l that monitor SMA pins via dpll netlink
> never learn when the pin state transitions (e.g. from SELECTABLE to
> CONNECTED).
>
> 2) ice_dpll_phase_offset_get() returns p->phase_offset for non-active
> SW pins, but this field is never updated for SW pins. The PPS phase
> offset monitor updates the backing CGU input's phase_offset
> (p->input->phase_offset), not the SW pin's own field. As a result
> non-active SW pins always report zero phase offset even when the
> backing CGU input has valid PPS measurements.
>
> 3) ice_dpll_pins_notify_mask() does not propagate phase offset change
> notifications to SW pins either. When a HW CGU pin gets a phase
> offset change notification, the SMA/U.FL pin wrapping it is never
> notified, so userspace consumers (ts2phc, synce4l) monitoring SW
> pins via dpll netlink never receive phase offset updates.
>
> Fix all three by:
>
> - In ice_dpll_phase_offset_get(), return the backing CGU input's
> phase_offset for input-direction SW pins instead of the SW pin's own
> (always zero) field.
>
> - Introduce ice_dpll_pin_ntf(), a thin wrapper around
> dpll_pin_change_ntf() that also sends notifications to any
> registered SMA/U.FL pin whose backing CGU input matches. Replace
> all direct dpll_pin_change_ntf() calls in the periodic notification
> paths with ice_dpll_pin_ntf(), so SW pins are automatically notified
> whenever their backing HW pin is.
>
> Fixes: 2dd5d03c77e2 ("ice: redesign dpll sma/u.fl pins control")
> Signed-off-by: Petr Oros <poros@xxxxxxxxxx>
> ---
> v4:
> - expanded scope to also fix phase offset reporting and phase offset
> notifications for SW pins (problems 2 and 3 above)
> - replaced ice_dpll_sw_pin_needs_notify() with ice_dpll_pin_ntf(),
> a unified wrapper that covers all notification paths
> - squashed into a single patch
> v3: https://lore.kernel.org/all/20260220140700.2910174-1-poros@xxxxxxxxxx/
> - added kdoc for ice_dpll_sw_pin_needs_notify() helper
> v2: https://lore.kernel.org/all/20260219131500.2271897-1-poros@xxxxxxxxxx/
> - extracted ice_dpll_sw_pin_needs_notify() helper for readability
> - moved loop variable into for() scope
> v1: https://lore.kernel.org/all/20260218211414.1411163-1-poros@xxxxxxxxxx/
> ---
> drivers/net/ethernet/intel/ice/ice_dpll.c | 47 +++++++++++++++++------
> 1 file changed, 36 insertions(+), 11 deletions(-)
>
While changing SMA pin status, though UFL pin status changes, Subscribe monitor logs only SMA pin status change.
Example: Setting SMA1 as Tx automatically changes U.FL1 state to disconnected, Subscribe monitor logs SMA status change but does not log UFL status change.