[PATCH v2 2/2] drm/amd/display: remove manual DisplayID VRR parsing from freesync caps

[Adriano Vero]

parse_edid_displayid_vrr() walked raw DisplayID bytes via struct edid*
to find Dynamic Video Timing Range Limits blocks when monitor_range
was zeroed. This is a layering violation.

Now that drm_get_monitor_range_displayid() in the DRM core fills
monitor_range from DisplayID Dynamic Video Timing blocks via the
proper displayid_iter infrastructure, parse_edid_displayid_vrr() is
redundant. Remove it and its drm_edid_raw() call from the VRR path.

drm_edid_raw() remains for parse_amd_vsdb() and parse_hdmi_amd_vsdb()
which read AMD vendor-specific CEA data blocks; those are tracked
separately.

Cc: Alex Deucher <alexander.deucher@xxxxxxx>
Cc: Harry Wentland <harry.wentland@xxxxxxx>
Cc: Rodrigo.Siqueira@xxxxxxx
Signed-off-by: Adriano Vero <litaliano00.contact@xxxxxxxxx>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 61 ++++---------------
 1 file changed, 11 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 085cc98bd..c61d6e1fe 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -13110,49 +13110,6 @@ static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector,
 	return ret;
 }
 
-static void parse_edid_displayid_vrr(struct drm_connector *connector,
-				     const struct edid *edid)
-{
-	u8 *edid_ext = NULL;
-	int i;
-	int j = 0;
-	u16 min_vfreq;
-	u16 max_vfreq;
-
-	if (!edid || !edid->extensions)
-		return;
-
-	/* Find DisplayID extension */
-	for (i = 0; i < edid->extensions; i++) {
-		edid_ext = (void *)(edid + (i + 1));
-		if (edid_ext[0] == DISPLAYID_EXT)
-			break;
-	}
-
-	if (i == edid->extensions)
-		return;
-
-	while (j < EDID_LENGTH) {
-		/* Get dynamic video timing range from DisplayID if available */
-		if (EDID_LENGTH - j > 13 && edid_ext[j] == 0x25	&&
-		    (edid_ext[j+1] & 0xFE) == 0 && (edid_ext[j+2] == 9)) {
-			min_vfreq = edid_ext[j+9];
-			if (edid_ext[j+1] & 7)
-				max_vfreq = edid_ext[j+10] + ((edid_ext[j+11] & 3) << 8);
-			else
-				max_vfreq = edid_ext[j+10];
-
-			if (max_vfreq && min_vfreq) {
-				connector->display_info.monitor_range.max_vfreq = max_vfreq;
-				connector->display_info.monitor_range.min_vfreq = min_vfreq;
-
-				return;
-			}
-		}
-		j++;
-	}
-}
-
 static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector,
 			  const struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info)
 {
@@ -13288,13 +13245,17 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 	if (!adev->dm.freesync_module || !dc_supports_vrr(sink->ctx->dce_version))
 		goto update;
 
-	edid = drm_edid_raw(drm_edid); // FIXME: Get rid of drm_edid_raw()
-
-	/* Some eDP panels only have the refresh rate range info in DisplayID */
-	if ((connector->display_info.monitor_range.min_vfreq == 0 ||
-	     connector->display_info.monitor_range.max_vfreq == 0))
-		parse_edid_displayid_vrr(connector, edid);
-
+	/**
+	 * monitor_range is now populated by the DRM core from both classic
+	 * EDID Monitor Range Limits descriptors and DisplayID Dynamic Video
+	 * Timing blocks (tag 0x25) via drm_get_monitor_range_displayid().
+	 * parse_edid_displayid_vrr() has been removed.
+	 *
+	 * drm_edid_raw() is retained only for parse_amd_vsdb() and
+	 * parse_hdmi_amd_vsdb() which read AMD vendor-specific CEA blocks.
+	 * Removing those raw accesses is tracked separately.
+	 */
+	edid = drm_edid_raw(drm_edid); /* TODO: amd/hdmi vsdb refactor */
 	if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
 		     sink->sink_signal == SIGNAL_TYPE_EDP)) {
 		if (amdgpu_dm_connector->dc_link &&
-- 
2.47.3