RE: [patch V5 00/15] Improve /proc/interrupts further

[Thomas Gleixner]

On Thu, Apr 02 2026 at 02:32, Michael Kelley wrote:
> From: Thomas Gleixner <tglx@xxxxxxxxxx> Sent: Wednesday, April 1, 2026 2:51 PM
> The improved alignment looks good. But if you want to be picky
> about the alignment, I noticed these things:
>
> On x86, the leftmost column now correctly aligns the "VPMI:" label.
> But the rightmost column does not correctly align the text
> "Perf Guest Mediated PMI". It needs one additional space. Here's my
> output (with some CPU columns removed so it's not so wide):
>
> root@mhkubun:~# cat /proc/interrupts | cut -b 1-30,64-
>             CPU0       CPU1       CPU5       CPU6       CPU7
>    8:          0          0          0          0          0  IO-APIC     8-edge      rtc0
>    9:          0          0          0          0          0  IO-APIC     9-fasteoi   acpi
>  NMI:          0          0          0          0          0  Non-maskable interrupts
>  LOC:          0          0          0          0          0  Local timer interrupts
>  PMI:          0          0          0          0          0  Performance monitoring interrupts
>  IWI:          1          0          0          0          0  IRQ work interrupts
>  RES:        325        231        235        341        231  Rescheduling interrupts
>  CAL:      11547       7178       9033       8798       6738  Function call interrupts
>  TLB:          0          0          0          0          0  TLB shootdowns
>  TRM:          0          0          0          0          0  Thermal event interrupt
>  THR:          0          0          0          0          0  Threshold APIC interrupts
>  MCE:          0          0          0          0          0  Machine check exceptions
>  MCP:          3          3          3          3          3  Machine check polls
>  HYP:       7300       5185        278       6960       1213  Hypervisor callback interrupts
>  HRE:          0          0          0          0          0  Hyper-V reenlightenment interrupts
>  HVS:       8963       4359       9784       8374      61709  Hyper-V stimer0 interrupts
>  PIN:          0          0          0          0          0  Posted-interrupt notification event
>  NPI:          0          0          0          0          0  Nested posted-interrupt event
>  PIW:          0          0          0          0          0  Posted-interrupt wakeup event
> VPMI:          0          0          0          0          0 Perf Guest Mediated PMI

That's weird. Let me have a look.

> On arm64, the leftmost column doesn't align the IPI<n> entries.
> Neither does the rightmost column for the IPI<n> entries. Here's some
> of my output:
>
>  45:          0           0         80          0          0  HV-PCI-MSIX-0817:00:02.0  14 Edge      mlx5_comp13@pci:0817:00:02.0
>  46:          0           0          0         10          0  HV-PCI-MSIX-0817:00:02.0  15 Edge      mlx5_comp14@pci:0817:00:02.0
>  47:          0           0          0          0         45  HV-PCI-MSIX-0817:00:02.0  16 Edge      mlx5_comp15@pci:0817:00:02.0
> IPI0:       906         536        649        495        606       Rescheduling interrupts
> IPI1:     28844       12457      14770      55242      39175       Function call interrupts
> IPI2:         0           0          0          0          0       CPU stop interrupts
> IPI3:         0           0          0          0          0       CPU stop NMIs
> IPI4:         0           0          0          0          0       Timer broadcast interrupts
> IPI5:        11           1          5          0          2       IRQ work interrupts
> IPI6:         0           0          0          0          0       CPU backtrace interrupts
> IPI7:         0           0          0          0          0       KGDB roundup interrupts
> Err:          0

So the problem is that the default width for the interupt number is 3,
while the IPI entries need 4. I can I make that default to 4.

The text of the IPIs is prepadded in arm64's arch_show_interrupts().