Re: [PATCH v2 02/12] drm/bridge: tc358762: Improce SYSCTRL register defines
From: kernel test robot
Date: Fri Apr 03 2026 - 04:41:13 EST
Hi Tomi,
kernel test robot noticed the following build errors:
[auto build test ERROR on 11439c4635edd669ae435eec308f4ab8a0804808]
url: https://github.com/intel-lab-lkp/linux/commits/Tomi-Valkeinen/drm-bridge-tc358762-Clean-up-register-defines/20260328-164947
base: 11439c4635edd669ae435eec308f4ab8a0804808
patch link: https://lore.kernel.org/r/20260327-tc358762-fixes-v2-2-3589d3c45f4a%40ideasonboard.com
patch subject: [PATCH v2 02/12] drm/bridge: tc358762: Improce SYSCTRL register defines
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20260402/202604021223.FtCNpGqO-lkp@xxxxxxxxx/config)
compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260402/202604021223.FtCNpGqO-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604021223.FtCNpGqO-lkp@xxxxxxxxx/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/bridge/tc358762.c:154:10: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
154 | FIELD_PREP(SYSCTRL_DPIDATA_IO_MASK, SYSCTRL_DPIDATA_IO_4MA) |
| ^
1 error generated.
vim +/FIELD_PREP +154 drivers/gpu/drm/bridge/tc358762.c
127
128 static int tc358762_init(struct tc358762 *ctx)
129 {
130 u32 lcdctrl;
131
132 tc358762_write(ctx, DSI_LANEENABLE,
133 DSI_LANEENABLE_L0EN | DSI_LANEENABLE_CLEN);
134 tc358762_write(ctx, PPI_D0S_CLRSIPOCOUNT, 5);
135 tc358762_write(ctx, PPI_D1S_CLRSIPOCOUNT, 5);
136 tc358762_write(ctx, PPI_D0S_ATMR, 0);
137 tc358762_write(ctx, PPI_D1S_ATMR, 0);
138 tc358762_write(ctx, PPI_LPTXTIMECNT, LPX_PERIOD);
139
140 tc358762_write(ctx, SPICMR, 0x00);
141
142 lcdctrl = LCDCTRL_VSDELAY(1) | LCDCTRL_RGB888 |
143 LCDCTRL_UNK6 | LCDCTRL_VTGEN;
144
145 if (ctx->mode.flags & DRM_MODE_FLAG_NHSYNC)
146 lcdctrl |= LCDCTRL_HSPOL;
147
148 if (ctx->mode.flags & DRM_MODE_FLAG_NVSYNC)
149 lcdctrl |= LCDCTRL_VSPOL;
150
151 tc358762_write(ctx, LCDCTRL, lcdctrl);
152
153 tc358762_write(ctx, SYSCTRL,
> 154 FIELD_PREP(SYSCTRL_DPIDATA_IO_MASK, SYSCTRL_DPIDATA_IO_4MA) |
155 FIELD_PREP(SYSCTRL_DPISTB_IO_MASK, SYSCTRL_DPISTB_IO_4MA) |
156 FIELD_PREP(SYSCTRL_PCLKDIV_MASK, SYSCTRL_PCLKDIV_DIV_3));
157
158 msleep(100);
159
160 tc358762_write(ctx, PPI_STARTPPI, PPI_STARTPPI_STARTPPI);
161 tc358762_write(ctx, DSI_STARTDSI, DSI_STARTDSI_STARTDSI);
162
163 msleep(100);
164
165 return tc358762_clear_error(ctx);
166 }
167
--
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