Re: [PATCH 2/5] arm64: dts: qcom: glymur: Fix cache and SRAM simple_bus_reg warnings
From: Dmitry Baryshkov
Date: Sat Apr 04 2026 - 15:43:51 EST
On Sat, Apr 04, 2026 at 11:51:01AM +0200, Krzysztof Kozlowski wrote:
> Correct the unit address of cache controller and SRAM nodes in Qualcomm
> Glymur SoC DTSI to fix W=1 DTC warnings:
>
> glymur.dtsi:5876.36-5908.5: Warning (simple_bus_reg): /soc@0/system-cache-controller@20400000: simple-bus unit address format error, expected "21800000"
> glymur.dtsi:5917.23-5934.5: Warning (simple_bus_reg): /soc@0/sram@81e08000: simple-bus unit address format error, expected "81e08600"
>
> Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/glymur.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
--
With best wishes
Dmitry