Re: [PATCH v4 3/3] PCI: dwc: Use common speed conversion function

[Hans Zhang]

On 4/5/26 00:35, Manivannan Sadhasivam wrote:
> On Sun, Nov 02, 2025 at 10:32:06PM +0800, Hans Zhang wrote:
> > Replace the private switch-based speed conversion in
> > dw_pcie_link_set_max_speed() with the public pci_bus_speed2lnkctl2()
> > function.
> >
> > This eliminates duplicate conversion logic and ensures consistency with
> > other PCIe drivers, while handling invalid speeds by falling back to
> > hardware capabilities.
> >
> > Signed-off-by: Hans Zhang <18255117159@xxxxxxx>
>
> Acked-by: Manivannan Sadhasivam <mani@xxxxxxxxxx>
>
> I hope Bjorn will merge this series.


Hi Mani,

Thank you. Since the pci-next branch has removed the direct reference to 
pcie_link_speed, I will re-create this series of patches based on the 
pci-next branch or v7.1-rc1.

Best regards,
Hans

> - Mani
>
> > ---
> >   drivers/pci/controller/dwc/pcie-designware.c | 18 +++---------------
> >   1 file changed, 3 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> > index c644216995f6..20ba314e82d5 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware.c
> > @@ -717,24 +717,12 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci)
> >   	ctrl2 = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCTL2);
> >   	ctrl2 &= ~PCI_EXP_LNKCTL2_TLS;
> >   
> > -	switch (pcie_link_speed[pci->max_link_speed]) {
> > -	case PCIE_SPEED_2_5GT:
> > -		link_speed = PCI_EXP_LNKCTL2_TLS_2_5GT;
> > -		break;
> > -	case PCIE_SPEED_5_0GT:
> > -		link_speed = PCI_EXP_LNKCTL2_TLS_5_0GT;
> > -		break;
> > -	case PCIE_SPEED_8_0GT:
> > -		link_speed = PCI_EXP_LNKCTL2_TLS_8_0GT;
> > -		break;
> > -	case PCIE_SPEED_16_0GT:
> > -		link_speed = PCI_EXP_LNKCTL2_TLS_16_0GT;
> > -		break;
> > -	default:
> > +	link_speed = pcie_link_speed[pci->max_link_speed];
> > +	link_speed = pci_bus_speed2lnkctl2(link_speed);
> > +	if (link_speed == 0) {
> >   		/* Use hardware capability */
> >   		link_speed = FIELD_GET(PCI_EXP_LNKCAP_SLS, cap);
> >   		ctrl2 &= ~PCI_EXP_LNKCTL2_HASD;
> > -		break;
> >   	}
> >   
> >   	dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCTL2, ctrl2 | link_speed);
> > --
> > 2.34.1