[PATCH 1/2] mmc: cqe: Add CQE DT support for cadence controller

From: rohan1sj via B4 Relay

Date: Tue Apr 07 2026 - 07:18:12 EST


From: rohan1sj <rohan1sj@xxxxxxxxxxx>

Add DT config required to support CQE as present in
cadence eMMC host controller

Signed-off-by: rohan1sj <rohan1sj@xxxxxxxxxxx>
---
.../devicetree/bindings/mmc/cdns,sdhci.yaml | 32 +++++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
index ac75d694611a..c0d8aefe20c2 100644
--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -24,6 +24,10 @@ properties:
minItems: 1
maxItems: 2

+ reg-names:
+ minItems: 1
+ maxItems: 2
+
interrupts:
maxItems: 1

@@ -139,7 +143,19 @@ allOf:
else:
properties:
reg:
- maxItems: 1
+ oneOf:
+ - items:
+ - description: Host controller registers
+ - items:
+ - description: Host controller registers
+ - description: CQE (Command Queue Engine) registers
+ reg-names:
+ oneOf:
+ - items:
+ - const: sdhci
+ - items:
+ - const: sdhci
+ - const: cqhci

unevaluatedProperties: false

@@ -156,3 +172,17 @@ examples:
mmc-hs400-1_8v;
cdns,phy-dll-delay-sdclk = <0>;
};
+
+ - |
+ emmc_cqe: mmc@5b000000 {
+ compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
+ reg = <0x5b000000 0x400>, <0x5b000400 0x060>;
+ reg-names = "sdhci", "cqhci";
+ interrupts = <0 79 4>;
+ clocks = <&clk 4>;
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ cdns,phy-dll-delay-sdclk = <0>;
+ };

--
2.34.1