[PATCH 1/3] riscv: dts: microchip: add tsu clock to macb on pic64gx
From: Conor Dooley
Date: Tue Apr 07 2026 - 11:48:06 EST
From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
In increment mode, the tsu clock for the macb is provided separately to
the pck, usually the same clock as the reference to the rtc provided by
an off-chip oscillator. pclk is 150 MHz typically, and the reference is
either 100 MHz or 125 MHz, so having the tsu clock is required for
correct rate selection.
Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
---
arch/riscv/boot/dts/microchip/pic64gx.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/boot/dts/microchip/pic64gx.dtsi b/arch/riscv/boot/dts/microchip/pic64gx.dtsi
index c164d7bc270a2..e9ec376b1776b 100644
--- a/arch/riscv/boot/dts/microchip/pic64gx.dtsi
+++ b/arch/riscv/boot/dts/microchip/pic64gx.dtsi
@@ -459,8 +459,8 @@ mac0: ethernet@20110000 {
interrupts = <64>, <65>, <66>, <67>, <68>, <69>;
/* Filled in by a bootloader */
local-mac-address = [00 00 00 00 00 00];
- clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>;
- clock-names = "pclk", "hclk";
+ clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>;
+ clock-names = "pclk", "hclk", "tsu_clk";
resets = <&mss_top_sysreg CLK_MAC0>;
status = "disabled";
};
@@ -475,8 +475,8 @@ mac1: ethernet@20112000 {
interrupts = <70>, <71>, <72>, <73>, <74>, <75>;
/* Filled in by a bootloader */
local-mac-address = [00 00 00 00 00 00];
- clocks = <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>;
- clock-names = "pclk", "hclk";
+ clocks = <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>;
+ clock-names = "pclk", "hclk", "tsu_clk";
resets = <&mss_top_sysreg CLK_MAC1>;
status = "disabled";
};
--
2.53.0