Re: [PATCH 3/3] drm/bridge: ti-sn65dsi83: add test pattern generation support

[Luca Ceresoli]

Hi Louis,

On Wed Apr 8, 2026 at 5:40 PM CEST, Louis Chauvet wrote:

>> @@ -645,7 +649,11 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
>>   			  REG_LVDS_LANE_CHB_LVDS_TERM : 0));
>>   	regmap_write(ctx->regmap, REG_LVDS_CM, 0x00);
>>
>> -	le16val = cpu_to_le16(mode->hdisplay);
>> +	/*
>> +	 * Active line length needs to be halved for test pattern
>> +	 * generation in dual LVDS output.
>> +	 */
>> +	le16val = cpu_to_le16(mode->hdisplay / (sn65dsi83_test_pattern ? 2 : 1));
>
> This will always half the line length, even for "mono" LVDS output no?
>  From the comment I expect something like
>
> if (dual && test_pattern)
> 	val = hdisplay/2
> else
> 	val = hdisplay

Aargh, my bad! I think what my brain wanted to write was rather:

   le16val = cpu_to_le16(mode->hdisplay / (sn65dsi83_test_pattern ? dual_factor : 1));
                                                                    ^^^^^^^^^^^

which is equivalent to your code. Will fix in v3.

Thanks for the thourough review!

Luca

--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com