Re: [PATCH v3 10/10] mm: thp: x86: cleanup PSE feature bit usage

[Zi Yan]

+X86 maintainers

On 8 Apr 2026, at 16:23, Luiz Capitulino wrote:

> Historically, THP support on x86 checked the PSE feature bit to enable
> THP. On 64-bit, this check is redundant since PSE is always enabled by
> default for compatibility. On 32-bit, PSE can enable 2 MiB or 4 MiB
> page sizes so it must be checked. To clean this up, this commit:
>
> 1. Drops arch_has_pmd_leaves() from common x86 code. For 64-bit,
>    we assume PMD-sized pages are always supported
>
> 2. Checks for PSE only on 32-bit by implementing arch_has_pmd_leaves()
>
> Signed-off-by: Luiz Capitulino <luizcap@xxxxxxxxxx>
> ---
>  arch/x86/include/asm/pgtable.h    | 6 ------
>  arch/x86/include/asm/pgtable_32.h | 6 ++++++
>  2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
> index 8fe95270b713..f45568f9513c 100644
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -314,12 +314,6 @@ static inline int pud_trans_huge(pud_t pud)
>  }
>  #endif
>
> -#define arch_has_pmd_leaves arch_has_pmd_leaves
> -static inline int arch_has_pmd_leaves(void)
> -{
> -	return boot_cpu_has(X86_FEATURE_PSE);
> -}
> -
>  #ifdef CONFIG_ARCH_SUPPORTS_PMD_PFNMAP
>  static inline bool pmd_special(pmd_t pmd)
>  {
> diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
> index acea0cfa2460..1db3214cfb45 100644
> --- a/arch/x86/include/asm/pgtable_32.h
> +++ b/arch/x86/include/asm/pgtable_32.h
> @@ -44,6 +44,12 @@ do {						\
>  	flush_tlb_one_kernel((vaddr));		\
>  } while (0)
>
> +#define arch_has_pmd_leaves arch_has_pmd_leaves
> +static inline int arch_has_pmd_leaves(void)
> +{
> +	return boot_cpu_has(X86_FEATURE_PSE);
> +}
> +
>  #endif /* !__ASSEMBLER__ */
>
>  /*
> -- 
> 2.53.0


Best Regards,
Yan, Zi