Re: [PATCH v3 10/10] mm: thp: x86: cleanup PSE feature bit usage

[Luiz Capitulino]

On 2026-04-09 16:10, Dave Hansen wrote:
> On 4/9/26 08:57, Zi Yan wrote:
> > Historically, THP support on x86 checked the PSE feature bit to enable
> > THP. On 64-bit, this check is redundant since PSE is always enabled by
> > default for compatibility.
>
> What do you mean by "PSE is always enabled by default"?
>
> A hypervisor is completely free to not enumerate PSE support to a guest.
> Any kernel can disable PSE with clearcpuid=3 on the command-line. PSE is
> also disabled for at least one erratum (which I think includes some
> 64-bit CPUs).

You're right, I was wrong to assume that PSE could be ignored on 64-bit.
Thanks for taking the time to show it. I'll drop this patch for v4.

> Here's a snippet in a 64-bit VM of /proc/cpuinfo on a normal boot:
>
> DirectMap4k:       83836 kB
> DirectMap2M:     1939456 kB
> DirectMap1G:     1048576 kB
>
> and with clearcpuid=3:
>
> DirectMap4k:     3071868 kB
> DirectMap2M:           0 kB
>
> Just to show that it's possible.
>
> So perhaps I'm reading into the changelog too much, but this doesn't
> quite seem right to me.