Re: [PATCH v2] net/mlx5: Fix OOB access and stack information leak in

[Prathamesh Deshpande]

On Thu, Apr 9, 2026 at 17:16 +0300, Carolina Jubran wrote:
> pin is defined as u8 in struct mlx5_eqe_pps, so pin < 0 is dead code.
> 
> As for the upper bound: in order to receive a PPS event on a pin, the 
> user must first configure it via mlx5_ptp_enable, which already 
> validates the index (rq->extts.index >= clock->ptp_info.n_pins returns 
> -EINVAL) and since the mtpps register only defines capabilities for 8 
> pins, so n_pins cannot exceed MAX_PIN_NUM.
> 
> Maybe wrap it with WARN_ON_ONCE instead of silently returning, so if 
> future hardware adds support for more pins we would notice rather than 
> silently dropping events.

Hi Carolina,

Thanks for the feedback. I've removed the redundant pin < 0 check and 
implemented the WARN_ON_ONCE for the upper bound as suggested.

I just submitted a v3 as a fresh thread with these changes and a fix 
for the union corruption bug.

Thanks,
Prathamesh