[PATCH 0/5] mtd/spi: Fix Winbond W35N02JW / W35N04JW support

[Miquel Raynal]

Winbond chips W35N02JW and W35N04JW differ slightly from W35N01JW. As
they have more blocks, they require a couple more bits to fully address
the whole device. These address bits have been stuffed at the end of the
command cycles, which is non standard, and this is something I didn't
catch in the first place.

Stuffing these address bits there implies the creation of a new spi-mem
command template.

While testing, I realized one of my former patches in the Cadence
controller was totally wrong, so it needs to be reverted.

Mark, if it is not too late, you may want to pull in the first 2
patches, and I will apply the SPI NAND patches in a fixes PR after -rc1
is out.

Sorry for the mess :-)

Thanks,
Miquèl

Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
---
Miquel Raynal (5):
      spi: cadence-qspi: Revert the filtering of certain opcodes in ODTR
      spi: spi-mem: Add a packed command operation
      mtd: spinand: Add support for packed read data ODTR commands
      mtd: spinand: winbond: Set the packed page read flag to W35N02/04JW
      mtd: spinand: winbond: Fix ODTR write VCR on W35NxxJW

 drivers/mtd/nand/spi/core.c       | 24 +++++++++++++++++++++---
 drivers/mtd/nand/spi/winbond.c    |  6 +++---
 drivers/spi/spi-cadence-quadspi.c |  4 ----
 include/linux/mtd/spinand.h       |  7 +++++++
 include/linux/spi/spi-mem.h       |  8 ++++++++
 5 files changed, 39 insertions(+), 10 deletions(-)
---
base-commit: a2e786cb711f88509c39b82d8e5a7e52b169b1a6
change-id: 20260410-winbond-6-19-rc1-oddr-7a87b98c452c

Best regards,
-- 
Miquel Raynal <miquel.raynal@xxxxxxxxxxx>