Re: [PATCH] LoongArch: Align FPU register state to 32 bytes
From: Huacai Chen
Date: Sat Apr 11 2026 - 09:12:39 EST
Applied, thanks.
Huacai
On Mon, Mar 30, 2026 at 5:49 PM Lisa Robinson <lisa@bytefly.space> wrote:
>
> Move fpr to the beginning of struct loongarch_fpu so it is naturally
> aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
> switch performance.
>
> Signed-off-by: Lisa Robinson <lisa@bytefly.space>
> ---
> arch/loongarch/include/asm/processor.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
> index c3bc44b5f5b3..ce8b953f8c79 100644
> --- a/arch/loongarch/include/asm/processor.h
> +++ b/arch/loongarch/include/asm/processor.h
> @@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
> BUILD_FPR_ACCESS(64)
>
> struct loongarch_fpu {
> + union fpureg fpr[NUM_FPU_REGS];
> uint64_t fcc; /* 8x8 */
> uint32_t fcsr;
> uint32_t ftop;
> - union fpureg fpr[NUM_FPU_REGS];
> };
>
> struct loongarch_lbt {
> --
> 2.53.0
>