Re: [PATCH 2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits

[Guo Ren]

On Sat, Apr 11, 2026 at 10:22 AM <fangyu.yu@xxxxxxxxxxxxxxxxx> wrote:
>
> From: Fangyu Yu <fangyu.yu@xxxxxxxxxxxxxxxxx>
>
> When the RISC-V IOMMU page table format support Svpbmt, PBMT provides
> a way to tag mappings with page-based memory types. Encode memory type
> via PBMT in RISC-V IOMMU PTEs:
>
>   - IOMMU_MMIO   -> PBMT=IO
>   - !IOMMU_CACHE -> PBMT=NC
>   - otherwise    -> PBMT=Normal (PBMT=0)
>
> Clear the PBMT field before applying the selected encoding, and only
> touch PBMT when PT_FEAT_RISCV_SVPBMT is advertised.
>
> Signed-off-by: Fangyu Yu <fangyu.yu@xxxxxxxxxxxxxxxxx>
> ---
>  drivers/iommu/generic_pt/fmt/riscv.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h
> index a7fef6266a36..02051bb3c6e5 100644
> --- a/drivers/iommu/generic_pt/fmt/riscv.h
> +++ b/drivers/iommu/generic_pt/fmt/riscv.h
> @@ -58,6 +58,8 @@ enum {
>         RISCVPT_G = BIT(5),
>         RISCVPT_A = BIT(6),
>         RISCVPT_D = BIT(7),
> +       RISCVPT_NC = BIT(61),
> +       RISCVPT_IO = BIT(62),
>         RISCVPT_RSW = GENMASK(9, 8),
>         RISCVPT_PPN32 = GENMASK(31, 10),
>
> @@ -237,6 +239,13 @@ static inline int riscvpt_iommu_set_prot(struct pt_common *common,
>                 pte |= RISCVPT_R;
>         if (!(iommu_prot & IOMMU_NOEXEC))
>                 pte |= RISCVPT_X;
> +       if (common->features & BIT(PT_FEAT_RISCV_SVPBMT)) {
> +               pte &= ~RISCVPT_PBMT;
> +               if (iommu_prot & IOMMU_MMIO)
> +                       pte |= RISCVPT_IO;
> +               else if (!(iommu_prot & IOMMU_CACHE))
> +                       pte |= RISCVPT_NC;
> +       }
>
>         /* Caller must specify a supported combination of flags */
>         if (unlikely((pte & (RISCVPT_X | RISCVPT_W | RISCVPT_R)) == 0))
> --
> 2.50.1
>
I'm okay with the current way of  MMIO & CACHE mapping to IO & NC.

Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>

-- 
Best Regards
 Guo Ren