[PATCH 2/2] clocksource: timer-econet-en751221: fix IRQ ack storm on interrupt handler

[kpursoty]

The interrupt handler acked by writing the current count back to compare:

  iowrite32(ioread32(reg_count(cpu)), reg_compare(cpu));

Since the interrupt fires when count >= compare, and the counter advances
past the written value before the MMIO write reaches the peripheral, the
condition re-asserts on the same bus cycle. This causes a tight IRQ storm
on CPU0, stalling boot at T=62s (measured: boot never progresses past
clockevents registration).

The EcoNet GPL kernel (arch/mips/econet/time2.c, cputmr_timer_ack()) acks
by writing the *next* deadline, which puts count < compare and clears the
pending condition. Write U32_MAX (unreachable before set_next_event()
programs the real deadline), consistent with cevt_dev_init() which also
writes U32_MAX to park the compare register at init.

Fixes: 3b4c33ac87d0 ("clocksource/drivers: Add EcoNet Timer HPT driver")
Signed-off-by: Kervin Pursoty <kpursoty@xxxxxxxxx>
---
 drivers/clocksource/timer-econet-en751221.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/timer-econet-en751221.c b/drivers/clocksource/timer-econet-en751221.c
--- a/drivers/clocksource/timer-econet-en751221.c
+++ b/drivers/clocksource/timer-econet-en751221.c
@@ -68,7 +68,9 @@ static irqreturn_t cevt_interrupt(int irq, void *dev_id)
 	if (!cevt_is_pending(cpu))
 		return IRQ_NONE;

-	iowrite32(ioread32(reg_count(cpu)), reg_compare(cpu));
+	/* Ack: write a future value so count < compare, clearing the pending
+	 * condition. set_next_event() will program the real deadline. */
+	iowrite32(U32_MAX, reg_compare(cpu));
 	dev->event_handler(dev);
 	return IRQ_HANDLED;
 }