[RFC PATCH v2 3/3] gpio: mmio: add port-mapped support for gpio_generic_chip

[Jose Javier Rodriguez Barbarin]

Add a new structure gpio_generic_chip_port_config for configuring
PMIO chips. A new function gpio_generic_chip_port_init() allows to
configure them.

Add an io_port field to struct gpio_generic_chip to distinguish PMIO
from MMIO chips during initialization and select the proper register
accessors.

Signed-off-by: Jose Javier Rodriguez Barbarin <dev-josejavier.rodriguez@xxxxxxxxxx>
---
 drivers/gpio/gpio-mmio.c     | 30 ++++++++++++++++++++++++--
 include/linux/gpio/generic.h | 41 ++++++++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index d23c5d275e6b..01e2afd8d6f1 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -740,8 +740,12 @@ static int gpio_generic_chip_init_common(struct gpio_generic_chip *chip,
 	if (ret)
 		return ret;
 
-	ret = gpio_mmio_setup_accessors(dev, chip,
-				flags & GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER);
+	if (chip->io_port)
+		ret = gpio_port_setup_accessors(dev, chip,
+					flags & GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER);
+	else
+		ret = gpio_mmio_setup_accessors(dev, chip,
+					flags & GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER);
 	if (ret)
 		return ret;
 
@@ -801,11 +805,33 @@ int gpio_generic_chip_init(struct gpio_generic_chip *chip,
 	chip->reg_clr.mmio = cfg->clr;
 	chip->reg_dir_in.mmio = cfg->dirin;
 	chip->reg_dir_out.mmio = cfg->dirout;
+	chip->io_port = true;
 
 	return gpio_generic_chip_init_common(chip, cfg->sz, cfg->flags, cfg->dev);
 }
 EXPORT_SYMBOL_GPL(gpio_generic_chip_init);
 
+/**
+ * gpio_generic_chip_port_init() - Initialize a generic GPIO chip for I/O port devices
+ * @chip: Generic GPIO chip to set up.
+ * @cfg: Generic GPIO chip configuration.
+ *
+ * Returns 0 on success, negative error number on failure.
+ */
+int gpio_generic_chip_port_init(struct gpio_generic_chip *chip,
+			   const struct gpio_generic_chip_port_config *cfg)
+{
+	chip->reg_dat.port = cfg->dat;
+	chip->reg_set.port = cfg->set;
+	chip->reg_clr.port = cfg->clr;
+	chip->reg_dir_in.port = cfg->dirin;
+	chip->reg_dir_out.port = cfg->dirout;
+	chip->io_port = true;
+
+	return gpio_generic_chip_init_common(chip, cfg->sz, cfg->flags, cfg->dev);
+}
+EXPORT_SYMBOL_GPL(gpio_generic_chip_port_init);
+
 #if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM)
 
 static void __iomem *gpio_mmio_map(struct platform_device *pdev,
diff --git a/include/linux/gpio/generic.h b/include/linux/gpio/generic.h
index 30f0d87422e9..93ce5f09c0d3 100644
--- a/include/linux/gpio/generic.h
+++ b/include/linux/gpio/generic.h
@@ -56,6 +56,43 @@ struct gpio_generic_chip_config {
 	unsigned long flags;
 };
 
+/**
+ * struct gpio_generic_chip_port_config - Generic GPIO chip configuration data for I/O port devices
+ * @dev: Parent device of the new GPIO chip (compulsory).
+ * @sz: Size (width) of the PMIO registers in bytes, typically 1, 2 or 4.
+ * @dat: PMIO address for the register to READ the value of the GPIO lines, it
+ *       is expected that a 1 in the corresponding bit in this register means
+ *       the line is asserted.
+ * @set: PMIO address for the register to SET the value of the GPIO lines, it
+ *       is expected that we write the line with 1 in this register to drive
+ *       the GPIO line high.
+ * @clr: PMIO address for the register to CLEAR the value of the GPIO lines,
+ *       it is expected that we write the line with 1 in this register to
+ *       drive the GPIO line low. It is allowed to leave this address as NULL,
+ *       in that case the SET register will be assumed to also clear the GPIO
+ *       lines, by actively writing the line with 0.
+ * @dirout: PMIO address for the register to set the line as OUTPUT. It is
+ *          assumed that setting a line to 1 in this register will turn that
+ *          line into an output line. Conversely, setting the line to 0 will
+ *          turn that line into an input.
+ * @dirin: PMIO address for the register to set this line as INPUT. It is
+ *         assumed that setting a line to 1 in this register will turn that
+ *         line into an input line. Conversely, setting the line to 0 will
+ *         turn that line into an output.
+ * @flags: Different flags that will affect the behaviour of the device, such
+ *         as endianness etc.
+ */
+struct gpio_generic_chip_port_config {
+	struct device *dev;
+	unsigned long sz;
+	unsigned long dat;
+	unsigned long set;
+	unsigned long clr;
+	unsigned long dirout;
+	unsigned long dirin;
+	unsigned long flags;
+};
+
 /**
  * union gpio_chip_reg - Generic GPIO chip register descriptor for MMIO or port-mapped I/O
  * @mmio: MMIO register address.
@@ -79,6 +116,7 @@ union gpio_chip_reg {
  *           representing line 0, bit 30 is line 1 ... bit 0 is line 31) this
  *           is set to true by the generic GPIO core. It is for internal
  *           housekeeping only.
+ * @io_port: indicates that the device is I/O port-mapped
  * @reg_dat: data (in) register for generic GPIO
  * @reg_set: output set register (out=high) for generic GPIO
  * @reg_clr: output clear register (out=low) for generic GPIO
@@ -100,6 +138,7 @@ struct gpio_generic_chip {
 	unsigned long (*read_reg)(union gpio_chip_reg *reg);
 	void (*write_reg)(union gpio_chip_reg *reg, unsigned long data);
 	bool be_bits;
+	bool io_port;
 	union gpio_chip_reg reg_dat;
 	union gpio_chip_reg reg_set;
 	union gpio_chip_reg reg_clr;
@@ -122,6 +161,8 @@ to_gpio_generic_chip(struct gpio_chip *gc)
 int gpio_generic_chip_init(struct gpio_generic_chip *chip,
 			   const struct gpio_generic_chip_config *cfg);
 
+int gpio_generic_chip_port_init(struct gpio_generic_chip *chip,
+				const struct gpio_generic_chip_port_config *cfg);
 /**
  * gpio_generic_chip_set() - Set the GPIO line value of the generic GPIO chip.
  * @chip: Generic GPIO chip to use.
-- 
2.53.0