[PATCH v2 4/5] pinctrl: renesas: rzg2l: Add NOD register cache for PM suspend/resume
From: Prabhakar
Date: Mon Apr 13 2026 - 14:27:24 EST
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Include the NOD (N-ch Open Drain) register in the PM suspend/resume
register cache.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
v1->v2:
- New patch
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 37 +++++++++++++++++++++++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index b2eb9dca7eec..be6d229c927b 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -323,6 +323,7 @@ struct rzg2l_pinctrl_pin_settings {
* @ien: IEN registers cache
* @smt: SMT registers cache
* @sr: SR registers cache
+ * @nod: NOD registers cache
* @sd_ch: SD_CH registers cache
* @eth_poc: ET_POC registers cache
* @oen: Output Enable register cache
@@ -338,6 +339,7 @@ struct rzg2l_pinctrl_reg_cache {
u32 *pupd[2];
u32 *smt[2];
u32 *sr[2];
+ u32 *nod[2];
u8 sd_ch[2];
u8 eth_poc[2];
u8 oen;
@@ -2767,6 +2769,11 @@ static int rzg2l_pinctrl_reg_cache_alloc(struct rzg2l_pinctrl *pctrl)
if (!cache->sr[i])
return -ENOMEM;
+ cache->nod[i] = devm_kcalloc(pctrl->dev, nports, sizeof(*cache->nod[i]),
+ GFP_KERNEL);
+ if (!cache->nod[i])
+ return -ENOMEM;
+
/* Allocate dedicated cache. */
dedicated_cache->iolh[i] = devm_kcalloc(pctrl->dev, n_dedicated_pins,
sizeof(*dedicated_cache->iolh[i]),
@@ -2785,6 +2792,12 @@ static int rzg2l_pinctrl_reg_cache_alloc(struct rzg2l_pinctrl *pctrl)
GFP_KERNEL);
if (!dedicated_cache->sr[i])
return -ENOMEM;
+
+ dedicated_cache->nod[i] = devm_kcalloc(pctrl->dev, n_dedicated_pins,
+ sizeof(*dedicated_cache->nod[i]),
+ GFP_KERNEL);
+ if (!dedicated_cache->nod[i])
+ return -ENOMEM;
}
pctrl->cache = cache;
@@ -3016,7 +3029,7 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
struct rzg2l_pinctrl_reg_cache *cache = pctrl->cache;
for (u32 port = 0; port < nports; port++) {
- bool has_iolh, has_ien, has_pupd, has_smt, has_sr;
+ bool has_iolh, has_ien, has_pupd, has_smt, has_sr, has_nod;
u32 off, caps;
u8 pincnt;
u64 cfg;
@@ -3039,6 +3052,7 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
has_pupd = !!(caps & PIN_CFG_PUPD);
has_smt = !!(caps & PIN_CFG_SMT);
has_sr = !!(caps & PIN_CFG_SR);
+ has_nod = !!(caps & PIN_CFG_NOD);
if (suspend)
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PFC(off), cache->pfc[port]);
@@ -3099,6 +3113,15 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
cache->sr[1][port]);
}
}
+
+ if (has_nod) {
+ RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),
+ cache->nod[0][port]);
+ if (pincnt >= 4) {
+ RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off) + 4,
+ cache->nod[1][port]);
+ }
+ }
}
}
@@ -3113,7 +3136,7 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
* port offset are close together.
*/
for (i = 0, caps = 0; i < pctrl->data->n_dedicated_pins; i++) {
- bool has_iolh, has_ien, has_sr;
+ bool has_iolh, has_ien, has_sr, has_nod;
u32 off, next_off = 0;
u64 cfg, next_cfg;
u8 pincnt;
@@ -3136,6 +3159,7 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
PIN_CFG_IOLH_C | PIN_CFG_IOLH_RZV2H));
has_ien = !!(caps & PIN_CFG_IEN);
has_sr = !!(caps & PIN_CFG_SR);
+ has_nod = !!(caps & PIN_CFG_NOD);
pincnt = hweight8(FIELD_GET(RZG2L_SINGLE_PIN_BITS_MASK, cfg));
if (has_iolh) {
@@ -3150,6 +3174,10 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + SR(off),
cache->sr[0][i]);
}
+ if (has_nod) {
+ RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),
+ cache->nod[0][i]);
+ }
if (pincnt >= 4) {
if (has_iolh) {
RZG2L_PCTRL_REG_ACCESS32(suspend,
@@ -3166,6 +3194,11 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
pctrl->base + SR(off) + 4,
cache->sr[1][i]);
}
+ if (has_nod) {
+ RZG2L_PCTRL_REG_ACCESS32(suspend,
+ pctrl->base + NOD(off) + 4,
+ cache->nod[1][i]);
+ }
}
caps = 0;
}
--
2.53.0