RE: [PATCH v1] PCI: imx6: Add force_suspend flag to override L1SS suspend skip

[Hongxing Zhu]

> -----Original Message-----
> From: Bjorn Helgaas <helgaas@xxxxxxxxxx>
> Sent: 2026年4月11日 6:54
> To: Hongxing Zhu <hongxing.zhu@xxxxxxx>
> Cc: mani@xxxxxxxxxx; Frank Li <frank.li@xxxxxxx>; jingoohan1@xxxxxxxxx;
> l.stach@xxxxxxxxxxxxxx; lpieralisi@xxxxxxxxxx; kwilczynski@xxxxxxxxxx;
> robh@xxxxxxxxxx; bhelgaas@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx; stable@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH v1] PCI: imx6: Add force_suspend flag to override L1SS
> suspend skip
> 
> On Wed, Apr 08, 2026 at 02:38:35AM +0000, Hongxing Zhu wrote:
> > ...
> 
> > One additional note regarding NVMe: ASPM (Active State Power
> > Management) is disabled locally on i.MX platforms for NVMe devices.
> > This decision was made after encountering a system hang issue similar
> > to the one reported by Hans a few months ago in his patch listed below.
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore
> > .kernel.org%2Flinux-nvme%2F20250502032051.920990-1-hans.zhang%40cix
> tec
> >
> h.com%2F&data=05%7C02%7Chongxing.zhu%40nxp.com%7Cbcdec1ffa5144c
> dc70ec0
> >
> 8de97540509%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C639114
> 5842866
> >
> 17247%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIw
> LjAuMDAw
> >
> MCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C
> &sdat
> >
> a=Lpafp%2Fo3n%2FzCC%2F9iwxviRdFZzT8azQC%2FzSjTbArDV8E%3D&reserve
> d=0
> 
> Where is ASPM disabled for i.MX?  I don't see anything in pci-imx6.c.
Hi Bjorn:
Thanks for your concerns.
You're correct - the ASPM L1SS disabling for NVMe is currently implemented as
 a local quirk patch, not in pci-imx6.c.
> 
> It doesn't sound architecturally clean to me to disable ASPM based on
> whether an NVMe device is involved.

I agree this approach isn't ideal. The quirk-based solution was a temporary
 workaround.

Best Regards
Richard Zhu