Re: [PATCH] perf/x86/intel: Keep anythread_deprecated capability

[Mi, Dapeng]

On 4/14/2026 5:29 AM, Namhyung Kim wrote:
> In update_pmu_cap(), it reads MSR_IA32_PERF_CAPABILITIES on non-MTL CPUs
> to update the PMU capabilities.  But it resets the anythread_deprecated
> bit on GNR so I can see /sys/bus/event_source/devices/cpu/format/any
> even if dmesg says AnyThread is deprecated.
>
>   # dmesg | grep -A10 AnyThread
>   [   10.662423] Performance Events: XSAVE Architectural LBR, PEBS fmt5+-baseline,  AnyThread deprecated, Granite Rapids events, 32-deep LBR, full-width counters, Intel PMU driver.
>   [   10.663172] ... version:                   5
>   [   10.663173] ... bit width:                 48
>   [   10.663174] ... generic counters:          8
>   [   10.663174] ... generic bitmap:            00000000000000ff
>   [   10.663175] ... fixed-purpose counters:    4
>   [   10.663176] ... fixed-purpose bitmap:      000000000000000f
>   [   10.663176] ... value mask:                0000ffffffffffff
>   [   10.663177] ... max period:                00007fffffffffff
>   [   10.663178] ... global_ctrl mask:          0001000f000000ff
>   [   10.668979] signal: max sigframe size: 11952
>
> I guess it's not intentional and we want to keep deprecating anythread
> on these machines.
>
> Fixes: 25c623f41438fafc ("perf/x86/intel: Parse CPUID archPerfmonExt leaves for non-hybrid CPUs")
> Cc: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
> Signed-off-by: Namhyung Kim <namhyung@xxxxxxxxxx>
> ---
>  arch/x86/events/intel/core.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 4768236c054bbcf8..f1fae640cc8e5991 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -5945,8 +5945,12 @@ static void update_pmu_cap(struct pmu *pmu)
>  	}
>  
>  	if (!intel_pmu_broken_perf_cap()) {
> +		bool anythread = hybrid(pmu, intel_cap).anythread_deprecated;
> +
>  		/* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */
>  		rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);
> +		/* It seems anythread_deprecated is deleted unintentionally */
> +		hybrid(pmu, intel_cap).anythread_deprecated = anythread;
>  	}
>  }
>  

Namhyung, thanks for reporting this issue. But it may be not the best way
to fix the issue by restoring the anythread_deprecated bit in intel_cap. 

anythread_deprecated is enumerated in CPUID.0AH:EDX[15] instead of the
PERF_CAPABILITIES MSR. There is no anythread_deprecated bit in
PERF_CAPABILITIES MSR, It's not a good practice to
define anythread_deprecated bit in perf_capabilities .

Maybe we can do this, remove the anythread_deprecated from
perf_capabilities and directly depends on the CPUID.0AH:EDX[15] to check
if anythread is deprecated.

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 793335c3ce78..450c63165a22 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -7612,11 +7612,8 @@ __init int intel_pmu_init(void)

        x86_add_quirk(intel_arch_events_quirk); /* Install first, so it
runs last */

-       if (version >= 5) {
-               x86_pmu.intel_cap.anythread_deprecated =
edx.split.anythread_deprecated;
-               if (x86_pmu.intel_cap.anythread_deprecated)
-                       pr_cont(" AnyThread deprecated, ");
-       }
+       if (version >= 5 && edx.split.anythread_deprecated)
+               pr_cont(" AnyThread deprecated, ");

        /* The perf side of core PMU is ready to support the mediated vPMU. */
        x86_get_pmu(smp_processor_id())->capabilities |=
PERF_PMU_CAP_MEDIATED_VPMU;
@@ -8467,7 +8464,7 @@ __init int intel_pmu_init(void)
                                      &x86_pmu.intel_ctrl);

        /* AnyThread may be deprecated on arch perfmon v5 or later */
-       if (x86_pmu.intel_cap.anythread_deprecated)
+       if (edx.split.anythread_deprecated)
                x86_pmu.format_attrs = intel_arch_formats_attr;

        intel_pmu_check_event_constraints_all(NULL);
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index fad87d3c8b2c..01217c663dff 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -660,7 +660,7 @@ union perf_capabilities {
                u64     perf_metrics:1;
                u64     pebs_output_pt_available:1;
                u64     pebs_timing_info:1;
-               u64     anythread_deprecated:1;
+               u64     __reserved:1;
                u64     rdpmc_metrics_clear:1;
        };
        u64     capabilities;

Not fully tested, only test on SPR and it looks good. 

Thanks.