Re: [PATCH v3 1/5] arm64: dts: qcom: sm8550: add PCIe MHI register regions

[Konrad Dybcio]

On 4/9/26 5:26 PM, Joe Sandom via B4 Relay wrote:
> From: Joe Sandom <jsandom@xxxxxxxx>
> 
> Add the MHI register regions to the pcie0 and pcie1 controller nodes
> to expose link power state transition counters (L0s/L1/L1.1/L1.2/L2)
> via debugfs. The PCIe host driver uses this region to read the
> link_transition_count from the MHI registers.
> 
> Signed-off-by: Joe Sandom <jsandom@xxxxxxxx>
> ---


Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>

Konrad