RE: [PATCH v2 2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits

From: Tian, Kevin

Date: Wed Apr 15 2026 - 02:53:01 EST


> From: fangyu.yu@xxxxxxxxxxxxxxxxx <fangyu.yu@xxxxxxxxxxxxxxxxx>
> Sent: Tuesday, April 14, 2026 7:02 PM
>
> From: Fangyu Yu <fangyu.yu@xxxxxxxxxxxxxxxxx>
>
> When the RISC-V IOMMU page table format support Svpbmt, PBMT provides
> a way to tag mappings with page-based memory types. Encode memory type
> via PBMT in RISC-V IOMMU PTEs:
>
> - IOMMU_MMIO -> PBMT=IO
> - !IOMMU_MMIO && !IOMMU_CACHE -> PBMT=NC
> - otherwise -> PBMT=Normal (PBMT=0)
>
> Only touch PBMT when PT_FEAT_RISCV_SVPBMT is advertised.
>
> Signed-off-by: Fangyu Yu <fangyu.yu@xxxxxxxxxxxxxxxxx>
> Reviewed-by: Jason Gunthorpe <jgg@xxxxxxxxxx>
> Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx>
> Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
> Reviewed-by: Nutty Liu <nutty.liu@xxxxxxxxxxx>

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>