Re: [PATCH v2] riscv: smp: Align secondary_start_sbi to 4 bytes

[Chen Pei]

On Wed, 15 Apr 2026 12:06:28 +1000, mpe@xxxxxxxxxx wrote:

> > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> > index 9c99c5ad6fe8..9f33be6260e1 100644
> > --- a/arch/riscv/kernel/head.S
> > +++ b/arch/riscv/kernel/head.S
> > @@ -127,6 +127,7 @@ relocate_enable_mmu:
> >   #endif /* CONFIG_MMU */
> >   #ifdef CONFIG_SMP
> >    .global secondary_start_sbi
> > + .align 2
> >   secondary_start_sbi:
> >    /* Mask all interrupts */
> >    csrw CSR_IE, zero
> 
> 
> Minor nit, but IMHO .balign is preferable in new code. It always byte 
> aligns, whereas .align has different meanings across architectures, and 
> on some arches (including riscv) requires the reader to do the math to 
> convert to a byte alignment.
> 
> These days there's also the SYM_CODE_START etc. macros defined via 
> linkage.h, which use __ALIGN from arch/riscv/include/asm/linkage.h, 
> which is already .balign 4.

Hi Michael,

Thank you for your review and reminder. If this patch is ultimately
approved (because the behavior of OpenSBI still needs clarification
based on the new reviewer's comments), I will update it using .balign.

Thanks,
Pei