[PATCH 01/10] serial: max310x: uniformize clock/freq types

[Hugo Villeneuve]

From: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx>

max310x_set_ref_clk() returns a 32-bits clock value, so there is no need
to have parameters and intermediate values defined as long. Change
clock and freq types to int.

Signed-off-by: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx>
---
 drivers/tty/serial/max310x.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index ac7d3f197c3a5ce3531d5607f48e21a807314021..7c1c3696f5684d6dcaf1149e54bfa96c202c7b26 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -545,7 +545,7 @@ static int max310x_set_baud(struct uart_port *port, int baud)
 	return (16*port->uartclk) / (c*(16*div + frac));
 }
 
-static int max310x_update_best_err(unsigned long f, long *besterr)
+static int max310x_update_best_err(unsigned int f, long *besterr)
 {
 	/* Use baudrate 115200 for calculate error */
 	long err = f % (460800 * 16);
@@ -559,11 +559,11 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
 }
 
 static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
-			       unsigned long freq, bool xtal)
+			       unsigned int freq, bool xtal)
 {
 	unsigned int div, clksrc, pllcfg = 0;
 	long besterr = -1;
-	unsigned long fdiv, fmul, bestfreq = freq;
+	unsigned int fdiv, fmul, bestfreq = freq;
 
 	/* First, update error without PLL */
 	max310x_update_best_err(freq, &besterr);
@@ -1268,7 +1268,8 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
 			 const struct max310x_if_cfg *if_cfg,
 			 struct regmap *regmaps[], int irq)
 {
-	int i, ret, fmin, fmax, freq;
+	unsigned int fmin, fmax, freq;
+	int i, ret;
 	struct max310x_port *s;
 	s32 uartclk = 0;
 	bool xtal;

-- 
2.47.3