Re: [PATCH v2 0/2] pinctrl: qcom: eliza: Split up some QUP pin groups
From: Alexander Koskovich
Date: Tue Apr 21 2026 - 04:29:30 EST
On Tuesday, April 21st, 2026 at 1:55 AM, Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx> wrote:
> On 26-04-20 14:27:46, Alexander Koskovich wrote:
> > Multiple QUPs have lanes that can be routed to one of two GPIOs and
> > collapsing them prevents devicetrees from requesting specific routing.
> >
> > For example, a board that wires an I2C SCL line to one of two GPIOs
> > cannot request that specific pin with the groups collapsed.
> >
> > This series splits them up so devicetrees can request the configuration
> > they need.
> >
> > Signed-off-by: Alexander Koskovich <akoskovich@xxxxx>
>
> Nack. That's the downstream way. In upstream we group them.
If I leave them grouped, and don't override function for i2c6 scl to
qup1_se6_l1_mira, probe fails for the amplifiers on my board.
Is there a way to select mira with having them grouped?
>
> If you want to play with the WIP bring-up, here is the tree we use:
>
> https://github.com/qualcomm-linux/kernel-topics/tree/early/hwe/eliza
>
> Qup nodes are already in there.
>
Thanks,
Alex