Re: [PATCH v2 1/6] mm: Make lazy MMU mode context-aware

[Kevin Brodsky]

On 21/04/2026 06:57, Alexander Gordeev wrote:
>>> + * PTEs that fall within the specified range might observe update speedups.
>>> + * The PTE range must belong to the specified memory space and not cross
>>> + * a page table boundary.
>> Does that mean that all PTEs mapping [addr, end) must belong to the same
>> PTE page? I think the wording should be more specific.
> I tried to state that end of the range must not exceed pmd_addr_end(addr, end).
> Any of these sounds better?
>
> The PTE range must belong to the specified memory space and ...
> a) the address range must not cross the parent PMD address range boundary
> b) the PTEs must belong to the same parent PMD

I think b) is good, maybe "PMD entry" to be even clearer.  My previous
suggestion of talking about "PTE page" isn't ideal since some
architectures have page tables smaller (or larger) than a page.

- Kevin