Re: [PATCH v2 3/5] pinctrl: renesas: rzg2l: Handle RZ/V2H(P) IOLH configuration in PM cache

[Lad, Prabhakar]

Hi Geert,

Thank you for the review.

On Wed, Apr 22, 2026 at 1:04 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Mon, 13 Apr 2026 at 20:25, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Include PIN_CFG_IOLH_RZV2H in the IOLH capability checks when saving
> > and restoring pin configuration registers.
> >
> > On RZ/V2H(P), the IOLH configuration is defined by the
> > PIN_CFG_IOLH_RZV2H capability. The previous implementation did not
> > account for this, causing the IOLH registers to be skipped during PM
> > save/restore.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -3033,7 +3033,8 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
> >                 }
> >
> >                 caps = FIELD_GET(PIN_CFG_MASK, cfg);
> > -               has_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B | PIN_CFG_IOLH_C));
> > +               has_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B |
> > +                                     PIN_CFG_IOLH_C | PIN_CFG_IOLH_RZV2H));
>
> Unless I am missing something, PIN_CFG_IOLH_RZV2H is only ever set for
> dedicated pins on RZ/V2H and RZ/G3E, so this change does not have any
> impact for now?
>
Agreed I will drop the changes from rzg2l_pinctrl_pm_setup_regs() and
send a v3 for this patch only.

Cheers,
Prabhakar
> >                 has_ien = !!(caps & PIN_CFG_IEN);
> >                 has_pupd = !!(caps & PIN_CFG_PUPD);
> >                 has_smt = !!(caps & PIN_CFG_SMT);
> > @@ -3131,7 +3132,8 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
> >                 }
> >
> >                 /* And apply them in a single shot. */
> > -               has_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B | PIN_CFG_IOLH_C));
> > +               has_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B |
> > +                                     PIN_CFG_IOLH_C | PIN_CFG_IOLH_RZV2H));
> >                 has_ien = !!(caps & PIN_CFG_IEN);
> >                 has_sr = !!(caps & PIN_CFG_SR);
> >                 pincnt = hweight8(FIELD_GET(RZG2L_SINGLE_PIN_BITS_MASK, cfg));
>
> This part LGTM.
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds