Re: [PATCH v2 3/5] pinctrl: renesas: rzg2l: Handle RZ/V2H(P) IOLH configuration in PM cache

[Lad, Prabhakar]

Hi Geert

On Fri, Apr 24, 2026 at 9:22 AM Lad, Prabhakar
<prabhakar.csengg@xxxxxxxxx> wrote:
>
> Hi Geert,
>
> Thank you for the review.
>
> On Wed, Apr 22, 2026 at 1:04 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> >
> > Hi Prabhakar,
> >
> > On Mon, 13 Apr 2026 at 20:25, Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > >
> > > Include PIN_CFG_IOLH_RZV2H in the IOLH capability checks when saving
> > > and restoring pin configuration registers.
> > >
> > > On RZ/V2H(P), the IOLH configuration is defined by the
> > > PIN_CFG_IOLH_RZV2H capability. The previous implementation did not
> > > account for this, causing the IOLH registers to be skipped during PM
> > > save/restore.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> >
> > Thanks for your patch!
> >
> > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > > @@ -3033,7 +3033,8 @@ static void rzg2l_pinctrl_pm_setup_regs(struct rzg2l_pinctrl *pctrl, bool suspen
> > >                 }
> > >
> > >                 caps = FIELD_GET(PIN_CFG_MASK, cfg);
> > > -               has_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B | PIN_CFG_IOLH_C));
> > > +               has_iolh = !!(caps & (PIN_CFG_IOLH_A | PIN_CFG_IOLH_B |
> > > +                                     PIN_CFG_IOLH_C | PIN_CFG_IOLH_RZV2H));
> >
> > Unless I am missing something, PIN_CFG_IOLH_RZV2H is only ever set for
> > dedicated pins on RZ/V2H and RZ/G3E, so this change does not have any
> > impact for now?
> >
> Agreed I will drop the changes from rzg2l_pinctrl_pm_setup_regs() and
> send a v3 for this patch only.
>
It looks like I need to resend the whole series because later patches
won't apply cleanly.

Cheers,
Prabhakar