Re: [Patch v2] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities

[Chen, Zide]

On 4/22/2026 10:33 PM, Dapeng Mi wrote:
> AnyThread mode deprecation is enumerated by CPUID.0AH:EDX[15] instead of
> PERF_CAPABILITIES MSR. It's not a good practice to define a bit to
> represent "anythread deprecation" in perf_capabilities. It leads to the
> anythread_deprecated bit could be overwritten by the real value of
> PERF_CAPABILITIES MSR, just like the below code in update_pmu_cap() does.
> 
> ```
> if (!intel_pmu_broken_perf_cap()) {
> 	/* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */
> 	rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);
> }
> ```
> 
> It leads to the anythread_deprecated bit is cleared to 0 and the "any"
> attribute is incorrectly shown in the /sys/devices/cpu/format/ folder on
> these support Perfmon v6 platforms, like Clearwater Forest.
> 
> ```
> $grep . /sys/devices/cpu/format/*
> /sys/devices/cpu/format/acr_mask:config2:0-63
> /sys/devices/cpu/format/any:config:21
> /sys/devices/cpu/format/cmask:config:24-31
> ```
> 
> So remove the anythread_deprecated bit from perf_capabilities structure
> and directly depends on CPUID.0AH:EDX[15] to judge if anythread is
> deprecated.
> 
> Cc: stable@xxxxxxxxxxxxxxx
> Reported-by: Namhyung Kim <namhyung@xxxxxxxxxx>
> Fixes: cadbaa039b99 ("perf/x86/intel: Make anythread filter support conditional")
> Acked-by: Namhyung Kim <namhyung@xxxxxxxxxx>
> Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
> ---

Reviewed-by:  Zide Chen <zide.chen@xxxxxxxxx>


> 
> V2: Address Namhyung and Zide's comments.
> 
> V1: https://lore.kernel.org/all/20260415021010.1248083-1-dapeng1.mi@xxxxxxxxxxxxxxx/
> 
>  arch/x86/events/intel/core.c | 10 +++-------
>  arch/x86/events/perf_event.h |  2 +-
>  2 files changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 793335c3ce78..f57a2903e4d6 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -7612,12 +7612,6 @@ __init int intel_pmu_init(void)
>  
>  	x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */
>  
> -	if (version >= 5) {
> -		x86_pmu.intel_cap.anythread_deprecated = edx.split.anythread_deprecated;
> -		if (x86_pmu.intel_cap.anythread_deprecated)
> -			pr_cont(" AnyThread deprecated, ");
> -	}
> -
>  	/* The perf side of core PMU is ready to support the mediated vPMU. */
>  	x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_MEDIATED_VPMU;
>  
> @@ -8467,8 +8461,10 @@ __init int intel_pmu_init(void)
>  				      &x86_pmu.intel_ctrl);
>  
>  	/* AnyThread may be deprecated on arch perfmon v5 or later */
> -	if (x86_pmu.intel_cap.anythread_deprecated)
> +	if (version >= 5 && edx.split.anythread_deprecated) {
>  		x86_pmu.format_attrs = intel_arch_formats_attr;
> +		pr_cont("AnyThread deprecated, ");
> +	}
>  
>  	intel_pmu_check_event_constraints_all(NULL);
>  
> diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
> index fad87d3c8b2c..01217c663dff 100644
> --- a/arch/x86/events/perf_event.h
> +++ b/arch/x86/events/perf_event.h
> @@ -660,7 +660,7 @@ union perf_capabilities {
>  		u64	perf_metrics:1;
>  		u64	pebs_output_pt_available:1;
>  		u64	pebs_timing_info:1;
> -		u64	anythread_deprecated:1;
> +		u64	__reserved:1;
>  		u64	rdpmc_metrics_clear:1;
>  	};
>  	u64	capabilities;