RE: [PATCH] spi: rzv2h-rspi: Fix silent failure in clock setup error path

[Cosmin-Gabriel Tanislav]

> -----Original Message-----
> From: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> Sent: Saturday, April 25, 2026 5:47 AM
> To: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>; broonie@xxxxxxxxxx
> Cc: Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>; linux-spi@xxxxxxxxxxxxxxx;
> linux-renesas-soc@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; john.madieu@xxxxxxxxx; Biju Das
> <biju.das.jz@xxxxxxxxxxxxxx>; John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>
> Subject: [PATCH] spi: rzv2h-rspi: Fix silent failure in clock setup error path
> 
> rzv2h_rspi_setup_clock() is declared to return u32 but returns -EINVAL
> when no valid clock parameters are found. Cast to u32, -EINVAL becomes
> 0xffffffea, which is a non-zero value. The caller in
> rzv2h_rspi_prepare_message() guards against failure with:
> 
> 	rspi->freq = rzv2h_rspi_setup_clock(rspi, speed_hz);
> 	if (!rspi->freq)
> 		return -EINVAL;
> 
> Because 0xffffffea is non-zero, the check is bypassed and the controller
> proceeds to program SPBR/SPCMD with stale values, leading to an unknown
> bit rate.
> 
> Return 0 on the failed-search path, consistent with the existing
> clk_set_rate() failure path which already returns 0.
> 
> Fixes: 77d931584dd3 ("spi: rzv2h-rspi: make transfer clock rate finding chip-specific")
> Signed-off-by: John Madieu <john.madieu.xa@xxxxxxxxxxxxxx>

Reviewed-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>

> ---
>  drivers/spi/spi-rzv2h-rspi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-rzv2h-rspi.c b/drivers/spi/spi-rzv2h-rspi.c
> index f45af5884638..1655efda7d20 100644
> --- a/drivers/spi/spi-rzv2h-rspi.c
> +++ b/drivers/spi/spi-rzv2h-rspi.c
> @@ -579,7 +579,7 @@ static u32 rzv2h_rspi_setup_clock(struct rzv2h_rspi_priv *rspi, u32 hz)
>  		rspi->info->find_pclk_rate(rspi->pclk, hz, &best_clock);
> 
>  	if (!best_clock.clk_rate)
> -		return -EINVAL;
> +		return 0;
> 
>  	ret = clk_set_rate(best_clock.clk, best_clock.clk_rate);
>  	if (ret)
> --
> 2.25.1