[PATCH v5 10/12] iio: dac: ad5686: add control_sync() for single-channel devices

From: Rodrigo Alencar via B4 Relay

Date: Fri May 01 2026 - 05:18:43 EST


From: Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>

Create ad5310_control_sync() and ad5683_control_sync() functions that
properly consume the mask definitions with FIELD_PREP(). This allows to
reuse a function that updates the control register with cached values,
without relying on confusing logic that depends on st->use_internal_vref,
which is initialized earlier in ad5686_probe() because it is also
applicable to the AD5686_REGMAP case, removing the need for the
has_external_vref. Powerdown masks initialization is simplified as
*_control_sync() masks outs any unused bits for the single-channel case.
The change cleans up ad5686_write_dac_powerdown() and ad5686_probe(),
organizing the code for feature extension, e.g. gain control support for
single-channel devices.

Signed-off-by: Rodrigo Alencar <rodrigo.alencar@xxxxxxxxxx>
---
drivers/iio/dac/ad5686.c | 94 +++++++++++++++++++++++++++---------------------
drivers/iio/dac/ad5686.h | 7 ++--
2 files changed, 59 insertions(+), 42 deletions(-)

diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c
index 4b279d46948d..b94efa6de16e 100644
--- a/drivers/iio/dac/ad5686.c
+++ b/drivers/iio/dac/ad5686.c
@@ -6,6 +6,7 @@
*/

#include <linux/array_size.h>
+#include <linux/bitfield.h>
#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/export.h>
@@ -13,6 +14,7 @@
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/sysfs.h>
+#include <linux/wordpart.h>

#include <linux/iio/iio.h>

@@ -24,6 +26,24 @@ static const char * const ad5686_powerdown_modes[] = {
"three_state"
};

+static int ad5310_control_sync(struct ad5686_state *st)
+{
+ unsigned int pd_val = st->pwr_down_mask & st->pwr_down_mode;
+
+ return st->write(st, AD5686_CMD_CONTROL_REG, 0,
+ FIELD_PREP(AD5310_PD_MSK, pd_val & AD5686_PD_MSK) |
+ FIELD_PREP(AD5310_REF_BIT_MSK, st->use_internal_vref ? 0 : 1));
+}
+
+static int ad5683_control_sync(struct ad5686_state *st)
+{
+ unsigned int pd_val = st->pwr_down_mask & st->pwr_down_mode;
+
+ return st->write(st, AD5686_CMD_CONTROL_REG, 0,
+ FIELD_PREP(AD5683_PD_MSK, pd_val & AD5686_PD_MSK) |
+ FIELD_PREP(AD5683_REF_BIT_MSK, st->use_internal_vref ? 0 : 1));
+}
+
static inline unsigned int ad5686_pd_mask_shift(const struct iio_chan_spec *chan)
{
if (chan->channel == chan->address)
@@ -95,8 +115,8 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
bool readin;
int ret;
struct ad5686_state *st = iio_priv(indio_dev);
- unsigned int val, ref_bit_msk;
- u8 shift, address = 0;
+ unsigned int val;
+ u8 address;

ret = kstrtobool(buf, &readin);
if (ret)
@@ -109,32 +129,34 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,

switch (st->chip_info->regmap_type) {
case AD5310_REGMAP:
- shift = 9;
- ref_bit_msk = AD5310_REF_BIT_MSK;
+ ret = ad5310_control_sync(st);
+ if (ret)
+ return ret;
break;
case AD5683_REGMAP:
- shift = 13;
- ref_bit_msk = AD5683_REF_BIT_MSK;
+ ret = ad5683_control_sync(st);
+ if (ret)
+ return ret;
break;
case AD5686_REGMAP:
- shift = 0;
- ref_bit_msk = 0;
/* AD5674R/AD5679R have 16 channels and 2 powerdown registers */
- if (chan->channel > 0x7)
+ val = st->pwr_down_mask & st->pwr_down_mode;
+ if (chan->channel > 0x7) {
address = 0x8;
+ val = upper_16_bits(val);
+ } else {
+ address = 0x0;
+ val = lower_16_bits(val);
+ }
+ ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, address, val);
+ if (ret)
+ return ret;
break;
default:
return -EINVAL;
}

- val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
- if (!st->use_internal_vref)
- val |= ref_bit_msk;
-
- ret = st->write(st, AD5686_CMD_POWERDOWN_DAC,
- address, val >> (address * 2));
-
- return ret ? ret : len;
+ return len;
}

static int ad5686_read_raw(struct iio_dev *indio_dev,
@@ -448,9 +470,6 @@ int ad5686_probe(struct device *dev,
{
struct ad5686_state *st;
struct iio_dev *indio_dev;
- unsigned int val, ref_bit_msk, shift;
- bool has_external_vref;
- u8 cmd;
int ret, i;

indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
@@ -468,13 +487,12 @@ int ad5686_probe(struct device *dev,
if (ret < 0 && ret != -ENODEV)
return ret;

- has_external_vref = ret != -ENODEV;
- st->vref_mv = has_external_vref ? ret / 1000 : st->chip_info->int_vref_mv;
+ st->use_internal_vref = ret == -ENODEV;
+ st->vref_mv = st->use_internal_vref ? st->chip_info->int_vref_mv : ret / 1000;

- /* Initialize masks to all ones provided the max shift (last channel) */
- shift = ad5686_pd_mask_shift(&st->chip_info->channels[st->chip_info->num_channels - 1]);
- st->pwr_down_mask = GENMASK(shift + 1, 0);
- st->pwr_down_mode = GENMASK(shift + 1, 0);
+ /* Initialize masks to all ones */
+ st->pwr_down_mask = ~0U;
+ st->pwr_down_mode = ~0U;

/* Set all the power down mode for all channels to 1K pulldown */
for (i = 0; i < st->chip_info->num_channels; i++) {
@@ -496,29 +514,25 @@ int ad5686_probe(struct device *dev,

switch (st->chip_info->regmap_type) {
case AD5310_REGMAP:
- cmd = AD5686_CMD_CONTROL_REG;
- ref_bit_msk = AD5310_REF_BIT_MSK;
- st->use_internal_vref = !has_external_vref;
+ ret = ad5310_control_sync(st);
+ if (ret)
+ return ret;
break;
case AD5683_REGMAP:
- cmd = AD5686_CMD_CONTROL_REG;
- ref_bit_msk = AD5683_REF_BIT_MSK;
- st->use_internal_vref = !has_external_vref;
+ ret = ad5683_control_sync(st);
+ if (ret)
+ return ret;
break;
case AD5686_REGMAP:
- cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
- ref_bit_msk = AD5686_REF_BIT_MSK;
+ ret = st->write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
+ st->use_internal_vref ? 0 : AD5686_REF_BIT_MSK);
+ if (ret)
+ return ret;
break;
default:
return -EINVAL;
}

- val = has_external_vref ? ref_bit_msk : 0;
-
- ret = st->write(st, cmd, 0, val);
- if (ret)
- return ret;
-
return devm_iio_device_register(dev, indio_dev);
}
EXPORT_SYMBOL_NS_GPL(ad5686_probe, "IIO_AD5686");
diff --git a/drivers/iio/dac/ad5686.h b/drivers/iio/dac/ad5686.h
index 6b7142fbade2..dc1961b8c15e 100644
--- a/drivers/iio/dac/ad5686.h
+++ b/drivers/iio/dac/ad5686.h
@@ -44,9 +44,12 @@
#define AD5686_CMD_READBACK_ENABLE_V2 0x5

#define AD5310_REF_BIT_MSK BIT(8)
-#define AD5683_REF_BIT_MSK BIT(12)
-#define AD5686_REF_BIT_MSK BIT(0)
+#define AD5310_PD_MSK GENMASK(10, 9)

+#define AD5683_REF_BIT_MSK BIT(12)
+#define AD5683_PD_MSK GENMASK(14, 13)
+
+#define AD5686_REF_BIT_MSK BIT(0)
#define AD5686_PD_MSK GENMASK(1, 0)

#define AD5686_PD_1K_TO_GND 0x1

--
2.43.0