Re: [PATCH net-next 4/5] net: ethernet: adi: Add a driver for the ADIN1140 MACPHY

From: Andrew Lunn

Date: Sat May 02 2026 - 23:36:53 EST


On Sun, May 03, 2026 at 02:24:53AM +0300, Ciprian Regus via B4 Relay wrote:
> From: Ciprian Regus <ciprian.regus@xxxxxxxxxx>
>
> Add a driver for ADIN1140. The device is a 10BASE-T1S MAC-PHY
> (integrated in the same package) that connects to a CPU over an SPI bus,
> and implements the Open Alliance TC6 protocol for control and frame
> transfers. As such, this driver relies on oa_tc6 for the communication
> with the device. The device has an alternative name (AD3306), so the
> driver can be probed using one of the two compatible strings.
>
> For control transactions, ADIN1140 only implements the protected mode.
> The driver has a custom implementation for the mii_bus access methods as a
> workaround for hardware issues:
>
> 1. The OA TC6 standard defines the direct and indirect access modes for
> MDIO transactions. The ADIN1140 incorrectly advertises indirect mode
> only (supported capabilities register - 0x2, bit 9), while actually
> implementing just the direct mode. We cannot rely on the CAP register
> to choose an access method (which oa_tc6 does by default, even though
> it only implements the direct mode), so the driver has to use its
> own.
> 2. The ADIN1140 cannot access the C22 register space of the internal
> PHY, while the PHY is busy receiving frames. If that happens, the
> CONFIG0 and CONFIG2 registers of the MAC will get corrupted and the
> data transfer will stop. Those two registers configure settings for
> the transfer protocol between the MAC and host, so the value for some
> of their subfields shouldn't be changed while the netdev is up.
> Since we know the PHY is internal, the MAC driver can implement a
> custom mii_bus, which can intercept C22 accesses. Most of the
> registers mapped in the 0x0 - 0x3 range (the only ones the PHY offers)
> are read only, and their value can be read from somewhere else (e.g
> the PHYID 1 & 2 have the same value as 0x1 in the MAC memory map).
> For the fields that are R/W (loopback and AN/reset) in the control
> register, the PHY driver already implements the set_loopback() and
> config_aneg() functions. The C22 write function of the driver is a
> no-op and is used to protect against the ioctl MDIO access path.
> C45 accesses do not cause this issue, so we can properly implement
> them.
>
> Signed-off-by: Ciprian Regus <ciprian.regus@xxxxxxxxxx>
> ---
> MAINTAINERS | 7 +
> drivers/net/ethernet/adi/Kconfig | 12 +
> drivers/net/ethernet/adi/Makefile | 1 +
> drivers/net/ethernet/adi/adin1140.c | 805 ++++++++++++++++++++++++++++++++++++
> 4 files changed, 825 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 1e58da5ef47a..f9784c25beac 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1843,6 +1843,13 @@ S: Supported
> W: https://ez.analog.com/linux-software-drivers
> F: drivers/dma/dma-axi-dmac.c
>
> +ANALOG DEVICES INC ETHERNET DRIVERS
> +M: Ciprian Regus <ciprian.regus@xxxxxxxxxx>
> +L: netdev@xxxxxxxxxxxxxxx
> +S: Maintained
> +W: https://ez.analog.com/linux-software-drivers
> +F: drivers/net/ethernet/adi/adin1140.c
> +
> ANALOG DEVICES INC ETHERNET PHY DRIVERS
> M: Ciprian Regus <ciprian.regus@xxxxxxxxxx>
> L: netdev@xxxxxxxxxxxxxxx
> diff --git a/drivers/net/ethernet/adi/Kconfig b/drivers/net/ethernet/adi/Kconfig
> index 760a9a60bc15..bdb8ff7d15da 100644
> --- a/drivers/net/ethernet/adi/Kconfig
> +++ b/drivers/net/ethernet/adi/Kconfig
> @@ -26,4 +26,16 @@ config ADIN1110
> Say yes here to build support for Analog Devices ADIN1110
> Low Power 10BASE-T1L Ethernet MAC-PHY.
>
> +config ADIN1140
> + tristate "Analog Devices ADIN1140 MAC-PHY"
> + depends on SPI
> + select ADIN1140_PHY
> + select OA_TC6
> + help
> + Say yes here to build support for Analog Devices, Inc. ADIN1140
> + 10BASE-T1S Ethernet MAC-PHY.
> +
> + To compile this driver as a module, choose M here. The module will be
> + called adin1140.
> +
> endif # NET_VENDOR_ADI
> diff --git a/drivers/net/ethernet/adi/Makefile b/drivers/net/ethernet/adi/Makefile
> index d0383d94303c..0390ca8ccc49 100644
> --- a/drivers/net/ethernet/adi/Makefile
> +++ b/drivers/net/ethernet/adi/Makefile
> @@ -4,3 +4,4 @@
> #
>
> obj-$(CONFIG_ADIN1110) += adin1110.o
> +obj-$(CONFIG_ADIN1140) += adin1140.o
> diff --git a/drivers/net/ethernet/adi/adin1140.c b/drivers/net/ethernet/adi/adin1140.c
> new file mode 100644
> index 000000000000..5bc3f5732ed8
> --- /dev/null
> +++ b/drivers/net/ethernet/adi/adin1140.c
> @@ -0,0 +1,805 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Driver for Analog Devices, Inc. ADIN1140 10BASE-T1S MAC-PHY
> + *
> + * Copyright 2026 Analog Devices Inc.
> + */
> +
> +#include <linux/etherdevice.h>
> +#include <linux/kernel.h>
> +#include <linux/mdio.h>
> +#include <linux/module.h>
> +#include <linux/oa_tc6.h>
> +#include <linux/phy.h>
> +
> +#define ADIN1140_MMS_REG(m, r) ((((m) & GENMASK(3, 0)) << 16) | \
> + ((r) & GENMASK(15, 0)))
> +
> +#define ADIN1140_MACPHY_ID_REG ADIN1140_MMS_REG(0x0, 0x1)

This is not an ADIN1140 MACPHY_ID_REG, it is the TC6 PHYID register.

> +
> +#define ADIN1140_CONFIG0_REG 0x0004
> +#define ADIN1140_CONFIG0_TXFCSVE BIT(14)
> +#define ADIN1140_CONFIG0_RFA_ZARFE BIT(12)
> +#define ADIN1140_CONFIG0_CPS_64 GENMASK(2, 1)
> +
> +#define ADIN1140_CONFIG2_REG ADIN1140_MMS_REG(0x0, 0x6)

This is not an ADIN1140 CONFIG2 register. It is the TC6 CONFIG2
register.

Please add the TC6 registers to include/linux/oa_tc6.

Andrew