Re: [PATCH] usb: dwc3: qcom: Modify interrupt handling for EUSB2 Phy targets

[Krishna Kurapati PSSNV]

On Mon, May 4, 2026 at 12:17 PM Neil Armstrong
<neil.armstrong@xxxxxxxxxx> wrote:
>
> Hi,
>
> On 5/2/26 11:56, Krishna Kurapati wrote:
> > Modify interrupt handling for EUSB2 Phy targets. Enable DP Interrupt
> > when an Low speed device is connnected and enable DM interrupt when
> > a High Speed/ Full Speed device is connected.
>
> Could you explain _why_ and not the content of the patch ?
>

ACK. Will modify the commit text.

> >
> > Signed-off-by: Krishna Kurapati <krishna.kurapati@xxxxxxxxxxxxxxxx>
> > ---
> > Tested remote wakeupon Glymur device by button press from a headset
> > connected to both Type-C and Type-A ports.
> >

[...]

> > +static const struct dwc3_qcom_platform_data dwc3_qcom_pdata = {
> > +     .uses_eusb2_phy = false,
> > +};
> > +
> > +static const struct dwc3_qcom_platform_data dwc3_qcom_glymur_pdata = {
>
> SM8550 was the first QCom upstream SoC to use eUSB, should it be covered as well like SM8650, X1, ... ?
>

Yes, I tested the patch on Glymur, hence sent it only for Glymur for
now. Will add other targets later.

Regards,
Krishna,