Re: [PATCH] iommu/amd: Fix a stale comment about which legacy mode is user visible
From: Joerg Roedel
Date: Mon May 04 2026 - 04:24:48 EST
Vasant, could you please have a look? I'd prefer a review from you or Suravee
before applying.
Thanks,
Joerg
On Mon, Apr 06, 2026 at 04:03:35PM -0700, Sean Christopherson wrote:
> On Fri, Mar 14, 2025, Sean Christopherson wrote:
> > Update a stale comment about which of the legacy modes is visible to the
> > user, i.e. can be forced via amd_iommu_intr=legacy.
> >
> > Fixes: b74aa02d7a30 ("iommu/amd: Fix legacy interrupt remapping for x2APIC-enabled system")
> > Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx>
> > ---
> > drivers/iommu/amd/amd_iommu_types.h | 11 ++++++-----
> > 1 file changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
> > index 23caea22f8dc..f7877abd0091 100644
> > --- a/drivers/iommu/amd/amd_iommu_types.h
> > +++ b/drivers/iommu/amd/amd_iommu_types.h
> > @@ -968,12 +968,13 @@ static inline int get_hpet_devid(int id)
> > }
> >
> > enum amd_iommu_intr_mode_type {
> > + /*
> > + * The legacy format mode is not visible to users to prevent the user
> > + * from crashing x2APIC systems, which for all intents and purposes
> > + * require 128-bit IRTEs. The legacy format will be forced as needed
> > + * when hardware doesn't support 128-bit IRTEs.
> > + */
> > AMD_IOMMU_GUEST_IR_LEGACY,
> > -
> > - /* This mode is not visible to users. It is used when
> > - * we cannot fully enable vAPIC and fallback to only support
> > - * legacy interrupt remapping via 128-bit IRTE.
> > - */
> > AMD_IOMMU_GUEST_IR_LEGACY_GA,
> > AMD_IOMMU_GUEST_IR_VAPIC,
> > };
> >
> > base-commit: ea9bd29a9c0d757b3384ae3e633e6bbaddf00725
> > --
>
> High latency ping! A year later, and this still applies cleanly :-)